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refactor and integrate usbh control xfer back to usbh.c

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fix enumeration with hub when reset port before set address
This commit is contained in:
hathach
2022-03-10 22:22:05 +07:00
parent b9ca301527
commit 171d021ab5
5 changed files with 317 additions and 217 deletions
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src/host/usbh_control.c
+23 -59
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@@ -26,7 +26,7 @@
#include "tusb_option.h"
#if CFG_TUH_ENABLED
#if CFG_TUH_ENABLED && 0
#include "tusb.h"
#include "usbh_classdriver.h"
@@ -36,86 +36,50 @@ typedef struct
tusb_control_request_t request TU_ATTR_ALIGNED(4);
uint8_t* buffer;
tuh_control_complete_cb_t complete_cb;
uint8_t daddr;
} usbh_control_xfer_t;
static usbh_control_xfer_t _ctrl_xfer;
static usbh_control_xfer_t _xfer;
static uint8_t _stage = CONTROL_STAGE_IDLE;
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
uint8_t usbh_control_xfer_stage(void)
{
return _stage;
}
bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb)
{
// TODO need to claim the endpoint first
const uint8_t rhport = usbh_get_rhport(dev_addr);
_ctrl_xfer.request = (*request);
_ctrl_xfer.buffer = buffer;
_ctrl_xfer.complete_cb = complete_cb;
_ctrl_xfer.xfer.daddr = dev_addr;
_ctrl_xfer.xfer.request = (*request);
_ctrl_xfer.xfer.buffer = buffer;
_ctrl_xfer.xfer.complete_cb = complete_cb;
_stage = CONTROL_STAGE_SETUP;
// Send setup packet
TU_ASSERT( hcd_setup_send(rhport, dev_addr, (uint8_t const*) &_ctrl_xfer.request) );
TU_ASSERT( hcd_setup_send(rhport, dev_addr, (uint8_t const*) &_ctrl_xfer.xfer.request) );
return true;
}
void usbh_control_xfer_abort(uint8_t dev_addr)
{
if (_ctrl_xfer.xfer.daddr == dev_addr) _stage = CONTROL_STAGE_IDLE;
}
static void _xfer_complete(uint8_t dev_addr, xfer_result_t result)
{
TU_LOG2("\r\n");
if (_ctrl_xfer.complete_cb) _ctrl_xfer.complete_cb(dev_addr, &_ctrl_xfer.request, result);
if (_ctrl_xfer.xfer.complete_cb) _ctrl_xfer.xfer.complete_cb(dev_addr, &_ctrl_xfer.xfer.request, result);
}
bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, uint8_t* stage, xfer_result_t result, uint32_t xferred_bytes)
{
(void) ep_addr;
(void) xferred_bytes;
const uint8_t rhport = usbh_get_rhport(dev_addr);
tusb_control_request_t const * request = &_ctrl_xfer.request;
if (XFER_RESULT_SUCCESS != result)
{
TU_LOG2("[%u:%u] Control %s\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED");
// terminate transfer if any stage failed
*stage = CONTROL_STAGE_IDLE;
_xfer_complete(dev_addr, result);
}else
{
switch(*stage)
{
case CONTROL_STAGE_SETUP:
*stage = CONTROL_STAGE_DATA;
if (request->wLength)
{
// DATA stage: initial data toggle is always 1
hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, request->bmRequestType_bit.direction), _ctrl_xfer.buffer, request->wLength);
return true;
}
__attribute__((fallthrough));
case CONTROL_STAGE_DATA:
*stage = CONTROL_STAGE_ACK;
if (request->wLength)
{
TU_LOG2("[%u:%u] Control data:\r\n", rhport, dev_addr);
TU_LOG2_MEM(_ctrl_xfer.buffer, request->wLength, 2);
}
// ACK stage: toggle is always 1
hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0);
break;
case CONTROL_STAGE_ACK:
*stage = CONTROL_STAGE_IDLE;
_xfer_complete(dev_addr, result);
break;
default: return false;
}
}
return true;
}
#endif