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added support for IAR retarget but not yet succeeded. lpc17xx have problem connect with jlink

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hathach
2014-03-04 16:31:44 +07:00
parent 6f24dd50a0
commit 2a866365e9
7 changed files with 56 additions and 79 deletions
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demos/bsp/boards/embedded_artists/ea4357/board_ea4357.h
-65
View File
@@ -65,71 +65,6 @@
//#define CFG_PRINTF_TARGET PRINTF_TARGET_SWO
#define CFG_PRINTF_TARGET PRINTF_TARGET_UART // FIXME keil's cmsis rtx does not work with UART (work with SWO)
// TODO clean up
/*=========================================================================
HARDWARE MAC ADDRESS
-----------------------------------------------------------------------*/
#define BOARD_MAC_ADDR0 0x00
#define BOARD_MAC_ADDR1 0x10
#define BOARD_MAC_ADDR2 0x20
#define BOARD_MAC_ADDR3 0x30
#define BOARD_MAC_ADDR4 0x40
#define BOARD_MAC_ADDR5 0x50
/*=========================================================================*/
/*=========================================================================
EMAC CONFIGURATION
-----------------------------------------------------------------------*/
/* The PHY address connected the to MII/RMII */
#define LPC_PHYDEF_PHYADDR 1 /**< The PHY address on the PHY device. */
/* Enable autonegotiation mode.
* If this is enabled, the PHY will attempt to auto-negotiate the
* best link mode if the PHY supports it. If this is not enabled,
* the PHY_USE_FULL_DUPLEX and PHY_USE_100MBS defines will be
* used to select the link mode. Note that auto-negotiation may
* take a few seconds to complete.
*/
#define PHY_USE_AUTONEG 1 /**< Enables auto-negotiation mode. */
/* Sets up the PHY interface to either full duplex operation or
* half duplex operation if PHY_USE_AUTONEG is not enabled.
*/
#define PHY_USE_FULL_DUPLEX 1 /**< Sets duplex mode to full. */
/* Sets up the PHY interface to either 100MBS operation or 10MBS
* operation if PHY_USE_AUTONEG is not enabled.
*/
#define PHY_USE_100MBS 1 /**< Sets data rate to 100Mbps. */
/* Selects RMII or MII connection type in the EMAC peripheral */
#define LPC_EMAC_RMII 1 /**< Use the RMII or MII driver variant */
/* Defines the number of descriptors used for RX */
#define LPC_NUM_BUFF_RXDESCS 20
/* Defines the number of descriptors used for TX */
#define LPC_NUM_BUFF_TXDESCS 20
/* Enables slow speed memory buffering
* Enable this define if you expect to transfer packets directly
* from SPI FLASH or any slower memory. This will add a check
* before queueing up the transfer pbuf to make sure the packet
* is not in slow memoey (defined by the LPC_SLOWMEM_ARRAY). If
* the packet does exists in slow memory, a pbuf will be created
* in the PBUF_RAM pool, copied to it, and sent from there.
*/
#define LPC_CHECK_SLOWMEM 0
/* Array of slow memory addresses for LPC_CHECK_SLOWMEM
* Define the array - start and ending address - for the slow
* memory regions in the system that need pbuf copies.
*
* Not defined since LPC_CHECK_SLOWMEM = 0.
*/
#define LPC_SLOWMEM_ARRAY
/*=========================================================================*/
#ifdef __cplusplus
}
#endif