move files around
This commit is contained in:
@@ -1,287 +0,0 @@
|
||||
;/**************************************************************************//**
|
||||
; * @file startup_LPC17xx.s
|
||||
; * @brief CMSIS Cortex-M3 Core Device Startup File for
|
||||
; * NXP LPC17xx Device Series
|
||||
; * @version V1.10
|
||||
; * @date 06. April 2011
|
||||
; *
|
||||
; * @note
|
||||
; * Copyright (C) 2009-2011 ARM Limited. All rights reserved.
|
||||
; *
|
||||
; * @par
|
||||
; * ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||
; * processor based microcontrollers. This file can be freely distributed
|
||||
; * within development tools that are supporting such ARM based processors.
|
||||
; *
|
||||
; * @par
|
||||
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
; *
|
||||
; ******************************************************************************/
|
||||
|
||||
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000200
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WDT_IRQHandler ; 16: Watchdog Timer
|
||||
DCD TIMER0_IRQHandler ; 17: Timer0
|
||||
DCD TIMER1_IRQHandler ; 18: Timer1
|
||||
DCD TIMER2_IRQHandler ; 19: Timer2
|
||||
DCD TIMER3_IRQHandler ; 20: Timer3
|
||||
DCD UART0_IRQHandler ; 21: UART0
|
||||
DCD UART1_IRQHandler ; 22: UART1
|
||||
DCD UART2_IRQHandler ; 23: UART2
|
||||
DCD UART3_IRQHandler ; 24: UART3
|
||||
DCD PWM1_IRQHandler ; 25: PWM1
|
||||
DCD I2C0_IRQHandler ; 26: I2C0
|
||||
DCD I2C1_IRQHandler ; 27: I2C1
|
||||
DCD I2C2_IRQHandler ; 28: I2C2
|
||||
DCD SPI_IRQHandler ; 29: SPI
|
||||
DCD SSP0_IRQHandler ; 30: SSP0
|
||||
DCD SSP1_IRQHandler ; 31: SSP1
|
||||
DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
|
||||
DCD RTC_IRQHandler ; 33: Real Time Clock
|
||||
DCD EINT0_IRQHandler ; 34: External Interrupt 0
|
||||
DCD EINT1_IRQHandler ; 35: External Interrupt 1
|
||||
DCD EINT2_IRQHandler ; 36: External Interrupt 2
|
||||
DCD EINT3_IRQHandler ; 37: External Interrupt 3
|
||||
DCD ADC_IRQHandler ; 38: A/D Converter
|
||||
DCD BOD_IRQHandler ; 39: Brown-Out Detect
|
||||
DCD USB_IRQHandler ; 40: USB
|
||||
DCD CAN_IRQHandler ; 41: CAN
|
||||
DCD DMA_IRQHandler ; 42: General Purpose DMA
|
||||
DCD I2S_IRQHandler ; 43: I2S
|
||||
DCD ENET_IRQHandler ; 44: Ethernet
|
||||
DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
|
||||
DCD MCPWM_IRQHandler ; 46: Motor Control PWM
|
||||
DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
|
||||
DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
|
||||
DCD USBActivity_IRQHandler ; 49: USB Activity interrupt to wakeup
|
||||
DCD CANActivity_IRQHandler ; 50: CAN Activity interrupt to wakeup
|
||||
|
||||
|
||||
IF :LNOT::DEF:NO_CRP
|
||||
AREA |.ARM.__at_0x02FC|, CODE, READONLY
|
||||
CRP_Key DCD 0xFFFFFFFF
|
||||
ENDIF
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WDT_IRQHandler [WEAK]
|
||||
EXPORT TIMER0_IRQHandler [WEAK]
|
||||
EXPORT TIMER1_IRQHandler [WEAK]
|
||||
EXPORT TIMER2_IRQHandler [WEAK]
|
||||
EXPORT TIMER3_IRQHandler [WEAK]
|
||||
EXPORT UART0_IRQHandler [WEAK]
|
||||
EXPORT UART1_IRQHandler [WEAK]
|
||||
EXPORT UART2_IRQHandler [WEAK]
|
||||
EXPORT UART3_IRQHandler [WEAK]
|
||||
EXPORT PWM1_IRQHandler [WEAK]
|
||||
EXPORT I2C0_IRQHandler [WEAK]
|
||||
EXPORT I2C1_IRQHandler [WEAK]
|
||||
EXPORT I2C2_IRQHandler [WEAK]
|
||||
EXPORT SPI_IRQHandler [WEAK]
|
||||
EXPORT SSP0_IRQHandler [WEAK]
|
||||
EXPORT SSP1_IRQHandler [WEAK]
|
||||
EXPORT PLL0_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT EINT0_IRQHandler [WEAK]
|
||||
EXPORT EINT1_IRQHandler [WEAK]
|
||||
EXPORT EINT2_IRQHandler [WEAK]
|
||||
EXPORT EINT3_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT BOD_IRQHandler [WEAK]
|
||||
EXPORT USB_IRQHandler [WEAK]
|
||||
EXPORT CAN_IRQHandler [WEAK]
|
||||
EXPORT DMA_IRQHandler [WEAK]
|
||||
EXPORT I2S_IRQHandler [WEAK]
|
||||
EXPORT ENET_IRQHandler [WEAK]
|
||||
EXPORT RIT_IRQHandler [WEAK]
|
||||
EXPORT MCPWM_IRQHandler [WEAK]
|
||||
EXPORT QEI_IRQHandler [WEAK]
|
||||
EXPORT PLL1_IRQHandler [WEAK]
|
||||
EXPORT USBActivity_IRQHandler [WEAK]
|
||||
EXPORT CANActivity_IRQHandler [WEAK]
|
||||
|
||||
WDT_IRQHandler
|
||||
TIMER0_IRQHandler
|
||||
TIMER1_IRQHandler
|
||||
TIMER2_IRQHandler
|
||||
TIMER3_IRQHandler
|
||||
UART0_IRQHandler
|
||||
UART1_IRQHandler
|
||||
UART2_IRQHandler
|
||||
UART3_IRQHandler
|
||||
PWM1_IRQHandler
|
||||
I2C0_IRQHandler
|
||||
I2C1_IRQHandler
|
||||
I2C2_IRQHandler
|
||||
SPI_IRQHandler
|
||||
SSP0_IRQHandler
|
||||
SSP1_IRQHandler
|
||||
PLL0_IRQHandler
|
||||
RTC_IRQHandler
|
||||
EINT0_IRQHandler
|
||||
EINT1_IRQHandler
|
||||
EINT2_IRQHandler
|
||||
EINT3_IRQHandler
|
||||
ADC_IRQHandler
|
||||
BOD_IRQHandler
|
||||
USB_IRQHandler
|
||||
CAN_IRQHandler
|
||||
DMA_IRQHandler
|
||||
I2S_IRQHandler
|
||||
ENET_IRQHandler
|
||||
RIT_IRQHandler
|
||||
MCPWM_IRQHandler
|
||||
QEI_IRQHandler
|
||||
PLL1_IRQHandler
|
||||
USBActivity_IRQHandler
|
||||
CANActivity_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
|
||||
END
|
||||
@@ -1,423 +0,0 @@
|
||||
//*****************************************************************************
|
||||
// +--+
|
||||
// | ++----+
|
||||
// +-++ |
|
||||
// | |
|
||||
// +-+--+ |
|
||||
// | +--+--+
|
||||
// +----+ Copyright (c) 2009-10 Code Red Technologies Ltd.
|
||||
//
|
||||
// Microcontroller Startup code for use with Red Suite
|
||||
//
|
||||
// Version : 101130
|
||||
//
|
||||
// Software License Agreement
|
||||
//
|
||||
// The software is owned by Code Red Technologies and/or its suppliers, and is
|
||||
// protected under applicable copyright laws. All rights are reserved. Any
|
||||
// use in violation of the foregoing restrictions may subject the user to criminal
|
||||
// sanctions under applicable laws, as well as to civil liability for the breach
|
||||
// of the terms and conditions of this license.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
|
||||
// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
|
||||
// CODE RED TECHNOLOGIES LTD.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
#define SVCall_Handler SVC_Handler
|
||||
|
||||
// Code Red - if CMSIS is being used, then SystemInit() routine
|
||||
// will be called by startup code rather than in application's main()
|
||||
#if defined (__USE_CMSIS)
|
||||
#include "system_LPC17xx.h"
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default handlers. These are aliased.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void MemManage_Handler(void);
|
||||
WEAK void BusFault_Handler(void);
|
||||
WEAK void UsageFault_Handler(void);
|
||||
WEAK void SVCall_Handler(void);
|
||||
WEAK void DebugMon_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the specific IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table.
|
||||
// This relies on the linker script to place at correct location in memory.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
__attribute__ ((section(".isr_vector")))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
// Core Level - CM3
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MPU fault handler
|
||||
BusFault_Handler, // The bus fault handler
|
||||
UsageFault_Handler, // The usage fault handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVCall_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// Chip Level - LPC17
|
||||
WDT_IRQHandler, // 16, 0x40 - WDT
|
||||
TIMER0_IRQHandler, // 17, 0x44 - TIMER0
|
||||
TIMER1_IRQHandler, // 18, 0x48 - TIMER1
|
||||
TIMER2_IRQHandler, // 19, 0x4c - TIMER2
|
||||
TIMER3_IRQHandler, // 20, 0x50 - TIMER3
|
||||
UART0_IRQHandler, // 21, 0x54 - UART0
|
||||
UART1_IRQHandler, // 22, 0x58 - UART1
|
||||
UART2_IRQHandler, // 23, 0x5c - UART2
|
||||
UART3_IRQHandler, // 24, 0x60 - UART3
|
||||
PWM1_IRQHandler, // 25, 0x64 - PWM1
|
||||
I2C0_IRQHandler, // 26, 0x68 - I2C0
|
||||
I2C1_IRQHandler, // 27, 0x6c - I2C1
|
||||
I2C2_IRQHandler, // 28, 0x70 - I2C2
|
||||
SPI_IRQHandler, // 29, 0x74 - SPI
|
||||
SSP0_IRQHandler, // 30, 0x78 - SSP0
|
||||
SSP1_IRQHandler, // 31, 0x7c - SSP1
|
||||
PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL)
|
||||
RTC_IRQHandler, // 33, 0x84 - RTC
|
||||
EINT0_IRQHandler, // 34, 0x88 - EINT0
|
||||
EINT1_IRQHandler, // 35, 0x8c - EINT1
|
||||
EINT2_IRQHandler, // 36, 0x90 - EINT2
|
||||
EINT3_IRQHandler, // 37, 0x94 - EINT3
|
||||
ADC_IRQHandler, // 38, 0x98 - ADC
|
||||
BOD_IRQHandler, // 39, 0x9c - BOD
|
||||
USB_IRQHandler, // 40, 0xA0 - USB
|
||||
CAN_IRQHandler, // 41, 0xa4 - CAN
|
||||
DMA_IRQHandler, // 42, 0xa8 - GP DMA
|
||||
I2S_IRQHandler, // 43, 0xac - I2S
|
||||
ENET_IRQHandler, // 44, 0xb0 - Ethernet
|
||||
RIT_IRQHandler, // 45, 0xb4 - RITINT
|
||||
MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM
|
||||
QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder
|
||||
PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL)
|
||||
USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup
|
||||
CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
#else
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the load address, execution address and length of the RW data section and
|
||||
// the execution and length of the BSS (zero initialized) section.
|
||||
// Note that these symbols are not normally used by the managed linker script
|
||||
// mechanism in Red Suite/LPCXpresso 3.6 (Windows) and LPCXpresso 3.8 (Linux).
|
||||
// They are provide here simply so this startup code can be used with earlier
|
||||
// versions of Red Suite which do not support the more advanced managed linker
|
||||
// script mechanism introduced in the above version. To enable their use,
|
||||
// define "USE_OLD_STYLE_DATA_BSS_INIT".
|
||||
//*****************************************************************************
|
||||
extern unsigned int _etext;
|
||||
extern unsigned int _data;
|
||||
extern unsigned int _edata;
|
||||
extern unsigned int _bss;
|
||||
extern unsigned int _ebss;
|
||||
#endif
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void
|
||||
ResetISR(void) {
|
||||
|
||||
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
#else
|
||||
// Use Old Style Data and BSS section initialization.
|
||||
// This will only initialize a single RAM bank.
|
||||
unsigned int * LoadAddr, *ExeAddr, *EndAddr, SectionLen;
|
||||
|
||||
// Copy the data segment from flash to SRAM.
|
||||
LoadAddr = &_etext;
|
||||
ExeAddr = &_data;
|
||||
EndAddr = &_edata;
|
||||
SectionLen = (void*)EndAddr - (void*)ExeAddr;
|
||||
data_init((unsigned int)LoadAddr, (unsigned int)ExeAddr, SectionLen);
|
||||
// Zero fill the bss segment
|
||||
ExeAddr = &_bss;
|
||||
EndAddr = &_ebss;
|
||||
SectionLen = (void*)EndAddr - (void*)ExeAddr;
|
||||
bss_init ((unsigned int)ExeAddr, SectionLen);
|
||||
#endif
|
||||
|
||||
#ifdef __USE_CMSIS
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main() ;
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SVCall_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void IntDefaultHandler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user