Add BSP support for F1C100s
This commit is contained in:
Yunhao Tian
@@ -0,0 +1,150 @@
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#ifndef __ARM32_H__
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#define __ARM32_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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struct arm_regs_t {
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uint32_t r[13];
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uint32_t sp;
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uint32_t lr;
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uint32_t pc;
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uint32_t cpsr;
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};
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static inline uint32_t arm32_read_p15_c1(void)
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{
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uint32_t value;
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__asm__ __volatile__(
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"mrc p15, 0, %0, c1, c0, 0"
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: "=r" (value)
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:
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: "memory");
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return value;
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}
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static inline void arm32_write_p15_c1(uint32_t value)
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{
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__asm__ __volatile__(
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"mcr p15, 0, %0, c1, c0, 0"
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:
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: "r" (value)
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: "memory");
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arm32_read_p15_c1();
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}
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static inline void arm32_interrupt_enable(void)
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{
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uint32_t tmp;
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__asm__ __volatile__(
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"mrs %0, cpsr\n"
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"bic %0, %0, #(1<<7)\n"
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"msr cpsr_cxsf, %0"
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: "=r" (tmp)
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:
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: "memory");
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}
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static inline void arm32_interrupt_disable(void)
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{
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uint32_t tmp;
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__asm__ __volatile__(
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"mrs %0, cpsr\n"
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"orr %0, %0, #(1<<7)\n"
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"msr cpsr_cxsf, %0"
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: "=r" (tmp)
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:
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: "memory");
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}
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static inline void arm32_mmu_enable(void)
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{
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uint32_t value = arm32_read_p15_c1();
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arm32_write_p15_c1(value | (1 << 0));
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}
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static inline void arm32_mmu_disable(void)
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{
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uint32_t value = arm32_read_p15_c1();
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arm32_write_p15_c1(value & ~(1 << 0));
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}
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static inline void arm32_dcache_enable(void)
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{
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uint32_t value = arm32_read_p15_c1();
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arm32_write_p15_c1(value | (1 << 2));
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}
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static inline void arm32_dcache_disable(void)
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{
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uint32_t value = arm32_read_p15_c1();
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arm32_write_p15_c1(value & ~(1 << 2));
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}
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static inline void arm32_icache_enable(void)
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{
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uint32_t value = arm32_read_p15_c1();
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arm32_write_p15_c1(value | (1 << 12));
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}
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static inline void arm32_icache_disable(void)
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{
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uint32_t value = arm32_read_p15_c1();
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arm32_write_p15_c1(value & ~(1 << 12));
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}
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static inline uint32_t arm32_smp_processor_id(void)
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{
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uint32_t tmp;
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__asm__ __volatile__(
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"mrc p15,0,%0,c0,c0,5\n"
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"and %0,%0,#0x3\n"
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: "=r" (tmp)
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:
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: "memory");
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return tmp;
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}
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static inline void arm32_ttb_set(uint32_t base)
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{
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__asm__ __volatile__(
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"mcr p15, 0, %0, c2, c0, 0"
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:
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: "r" (base)
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: "memory");
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}
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static inline void arm32_domain_set(uint32_t domain)
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{
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__asm__ __volatile__(
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"mcr p15, 0, %0, c3, c0, 0"
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:
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: "r" (domain)
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: "memory");
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}
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static inline void arm32_tlb_invalidate(void)
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{
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__asm__ __volatile__(
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"mov r0, #0\n"
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"mcr p15, 0, r0, c7, c10, 4\n"
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"mcr p15, 0, r0, c8, c6, 0\n"
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"mcr p15, 0, r0, c8, c5, 0\n"
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:
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:
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: "r0");
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ARM32_H__ */
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@@ -0,0 +1,66 @@
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#ifndef __F1C100S_GPIO_H__
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#define __F1C100S_GPIO_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define F1C100S_GPIOA0 (0)
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#define F1C100S_GPIOA1 (1)
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#define F1C100S_GPIOA2 (2)
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#define F1C100S_GPIOA3 (3)
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#define F1C100S_GPIOC0 (64)
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#define F1C100S_GPIOC1 (65)
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#define F1C100S_GPIOC2 (66)
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#define F1C100S_GPIOC3 (67)
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#define F1C100S_GPIOD0 (96)
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#define F1C100S_GPIOD1 (97)
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#define F1C100S_GPIOD2 (98)
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#define F1C100S_GPIOD3 (99)
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#define F1C100S_GPIOD4 (100)
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#define F1C100S_GPIOD5 (101)
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#define F1C100S_GPIOD6 (102)
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#define F1C100S_GPIOD7 (103)
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#define F1C100S_GPIOD8 (104)
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#define F1C100S_GPIOD9 (105)
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#define F1C100S_GPIOD10 (106)
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#define F1C100S_GPIOD11 (107)
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#define F1C100S_GPIOD12 (108)
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#define F1C100S_GPIOD13 (109)
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#define F1C100S_GPIOD14 (110)
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#define F1C100S_GPIOD15 (111)
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#define F1C100S_GPIOD16 (112)
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#define F1C100S_GPIOD17 (113)
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#define F1C100S_GPIOD18 (114)
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#define F1C100S_GPIOD19 (115)
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#define F1C100S_GPIOD20 (116)
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#define F1C100S_GPIOD21 (117)
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#define F1C100S_GPIOE0 (128)
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#define F1C100S_GPIOE1 (129)
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#define F1C100S_GPIOE2 (130)
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#define F1C100S_GPIOE3 (131)
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#define F1C100S_GPIOE4 (132)
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#define F1C100S_GPIOE5 (133)
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#define F1C100S_GPIOE6 (134)
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#define F1C100S_GPIOE7 (135)
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#define F1C100S_GPIOE8 (136)
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#define F1C100S_GPIOE9 (137)
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#define F1C100S_GPIOE10 (138)
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#define F1C100S_GPIOE11 (139)
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#define F1C100S_GPIOE12 (140)
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#define F1C100S_GPIOF0 (160)
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#define F1C100S_GPIOF1 (161)
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#define F1C100S_GPIOF2 (162)
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#define F1C100S_GPIOF3 (163)
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#define F1C100S_GPIOF4 (164)
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#define F1C100S_GPIOF5 (165)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __F1C100S_GPIO_H__ */
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@@ -0,0 +1,104 @@
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#ifndef __F1C100S_IRQ_H__
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#define __F1C100S_IRQ_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define F1C100S_IRQ_NMI (0)
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#define F1C100S_IRQ_UART0 (1)
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#define F1C100S_IRQ_UART1 (2)
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#define F1C100S_IRQ_UART2 (3)
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#define F1C100S_IRQ_SPDIF (5)
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#define F1C100S_IRQ_CIR (6)
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#define F1C100S_IRQ_I2C0 (7)
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#define F1C100S_IRQ_I2C1 (8)
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#define F1C100S_IRQ_I2C2 (9)
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#define F1C100S_IRQ_SPI0 (10)
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#define F1C100S_IRQ_SPI1 (11)
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#define F1C100S_IRQ_TIMER0 (13)
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#define F1C100S_IRQ_TIMER1 (14)
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#define F1C100S_IRQ_TIMER2 (15)
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#define F1C100S_IRQ_WDOG (16)
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#define F1C100S_IRQ_RSB (17)
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#define F1C100S_IRQ_DMA (18)
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#define F1C100S_IRQ_TP (20)
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#define F1C100S_IRQ_AUDIO (21)
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#define F1C100S_IRQ_LRADC (22)
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#define F1C100S_IRQ_MMC0 (23)
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#define F1C100S_IRQ_MMC1 (24)
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#define F1C100S_IRQ_USBOTG (26)
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#define F1C100S_IRQ_TVD (27)
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#define F1C100S_IRQ_TVE (28)
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#define F1C100S_IRQ_LCD (29)
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#define F1C100S_IRQ_DEFE (30)
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#define F1C100S_IRQ_DEBE (31)
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#define F1C100S_IRQ_CSI (32)
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#define F1C100S_IRQ_DEITLA (33)
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#define F1C100S_IRQ_VE (34)
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#define F1C100S_IRQ_I2S (35)
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#define F1C100S_IRQ_GPIOD (38)
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#define F1C100S_IRQ_GPIOE (39)
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#define F1C100S_IRQ_GPIOF (40)
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#define F1C100S_IRQ_GPIOD0 (64)
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#define F1C100S_IRQ_GPIOD1 (65)
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#define F1C100S_IRQ_GPIOD2 (66)
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#define F1C100S_IRQ_GPIOD3 (67)
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#define F1C100S_IRQ_GPIOD4 (68)
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#define F1C100S_IRQ_GPIOD5 (69)
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#define F1C100S_IRQ_GPIOD6 (70)
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#define F1C100S_IRQ_GPIOD7 (71)
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#define F1C100S_IRQ_GPIOD8 (72)
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#define F1C100S_IRQ_GPIOD9 (73)
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#define F1C100S_IRQ_GPIOD10 (74)
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#define F1C100S_IRQ_GPIOD11 (75)
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#define F1C100S_IRQ_GPIOD12 (76)
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#define F1C100S_IRQ_GPIOD13 (77)
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#define F1C100S_IRQ_GPIOD14 (78)
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#define F1C100S_IRQ_GPIOD15 (79)
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#define F1C100S_IRQ_GPIOD17 (80)
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#define F1C100S_IRQ_GPIOD18 (81)
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#define F1C100S_IRQ_GPIOD19 (82)
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#define F1C100S_IRQ_GPIOD20 (83)
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#define F1C100S_IRQ_GPIOD21 (84)
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#define F1C100S_IRQ_GPIOE0 (96)
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#define F1C100S_IRQ_GPIOE1 (97)
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#define F1C100S_IRQ_GPIOE2 (98)
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#define F1C100S_IRQ_GPIOE3 (99)
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#define F1C100S_IRQ_GPIOE4 (100)
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#define F1C100S_IRQ_GPIOE5 (101)
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#define F1C100S_IRQ_GPIOE6 (102)
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#define F1C100S_IRQ_GPIOE7 (103)
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#define F1C100S_IRQ_GPIOE8 (104)
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#define F1C100S_IRQ_GPIOE9 (105)
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#define F1C100S_IRQ_GPIOE10 (106)
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#define F1C100S_IRQ_GPIOE11 (107)
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#define F1C100S_IRQ_GPIOE12 (108)
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#define F1C100S_IRQ_GPIOF0 (128)
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#define F1C100S_IRQ_GPIOF1 (129)
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#define F1C100S_IRQ_GPIOF2 (130)
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#define F1C100S_IRQ_GPIOF3 (131)
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#define F1C100S_IRQ_GPIOF4 (132)
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#define F1C100S_IRQ_GPIOF5 (133)
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typedef void (*IRQHandleTypeDef)(void);
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uint8_t f1c100s_intc_get_nirq(void);
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void f1c100s_intc_dispatch(uint8_t nIRQ);
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void f1c100s_intc_set_isr(uint8_t nIRQ, IRQHandleTypeDef handle);
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void f1c100s_intc_enable_irq(uint8_t nIRQ);
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void f1c100s_intc_disable_irq(uint8_t nIRQ);
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void f1c100s_intc_unmask_irq(uint8_t nIRQ);
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void f1c100s_intc_mask_irq(uint8_t nIRQ);
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void f1c100s_intc_force_irq(uint8_t nIRQ);
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void f1c100s_intc_clear_pend(uint8_t nIRQ);
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void f1c100s_intc_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __F1C100S_IRQ_H__ */
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@@ -0,0 +1,39 @@
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#ifndef __F1C100S_RESET_H__
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#define __F1C100S_RESET_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define F1C100S_RESET_DMA (6)
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#define F1C100S_RESET_SD0 (8)
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#define F1C100S_RESET_SD1 (9)
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#define F1C100S_RESET_SDRAM (14)
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#define F1C100S_RESET_SPI0 (20)
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#define F1C100S_RESET_SPI1 (21)
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#define F1C100S_RESET_USB_OTG (24)
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#define F1C100S_RESET_VE (32)
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#define F1C100S_RESET_LCD (36)
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#define F1C100S_RESET_DEINTERLACE (37)
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#define F1C100S_RESET_CSI (40)
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#define F1C100S_RESET_TVD (41)
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#define F1C100S_RESET_TVE (42)
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#define F1C100S_RESET_DEBE (44)
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#define F1C100S_RESET_DEFE (46)
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#define F1C100S_RESET_ADDA (64)
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#define F1C100S_RESET_SPDIF (65)
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#define F1C100S_RESET_CIR (66)
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#define F1C100S_RESET_RSB (67)
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#define F1C100S_RESET_DAUDIO (76)
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#define F1C100S_RESET_I2C0 (80)
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#define F1C100S_RESET_I2C1 (81)
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#define F1C100S_RESET_I2C2 (82)
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#define F1C100S_RESET_UART0 (84)
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#define F1C100S_RESET_UART1 (85)
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#define F1C100S_RESET_UART2 (86)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __F1C100S_RESET_H__ */
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@@ -0,0 +1,139 @@
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// Designed by Hong Xuyao
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#ifndef __TARGET_H__
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#define __TARGET_H__
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////////////////////////////////////////////////////////////////////////////////
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#include <stdint.h>
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typedef unsigned long ubase_t;
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#define MEM_PI_SRAM __attribute__((section("SRAM")))
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#define MEM_PI_SUMMARY __attribute__((section("SUMMARY")))
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#define MEM_PI_NOINIT __attribute__((section("NOINIT"),zero_init))
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#define MEM_PI_CPUONLY __attribute__((section("CPUONLY"),zero_init))
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#define MEM_PI_HARDWARE __attribute__((section("HARDWARE"),zero_init,aligned(32)))
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#define MEM_PI_NCNB __attribute__((section("NCNB"),zero_init,aligned(32)))
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#define MEM_PI_STACK __attribute__((section("STACK"),zero_init,aligned(8)))
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#define CACHE_ALIGNED __attribute__((aligned(32)))
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#ifndef INLINE
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#define INLINE __attribute__((always_inline))
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#endif
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#ifndef NOINLINE
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#define NOINLINE __attribute__((noinline))
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#endif
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#ifndef NOINLINE_FUNC
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#define NOINLINE_FUNC __attribute__((noinline))
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#endif
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#ifndef ALIGN
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#define ALIGN(n) __attribute__((aligned(n)))
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#endif
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#define CPU_SR_DECL ubase_t cpu_sr
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#ifdef __thumb__
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#define __SWITCH_TO_ARM__
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#pragma arm
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#endif
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#if 0
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#define CPU_ENTER_CRITICAL() do{cpu_sr = util_enter_critical();}while(0)
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#else
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#define CPU_ENTER_CRITICAL() do{cpu_sr = __fast_enter_critical();}while(0)
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static inline ubase_t __fast_enter_critical(void)
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{
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ubase_t cpu_sr, tmp_sr;
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__asm volatile {
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MRS cpu_sr, CPSR
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ORR tmp_sr, cpu_sr, #0xC0
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MSR CPSR_c, tmp_sr
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}
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return cpu_sr;
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}
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#endif
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#if 0
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#define CPU_EXIT_CRITICAL() do{util_exit_critical(cpu_sr);}while(0)
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#else
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#define CPU_EXIT_CRITICAL() do{__fast_exit_critical(cpu_sr);}while(0)
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static inline void __fast_exit_critical(ubase_t cpu_sr)
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{
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__asm volatile {
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MSR CPSR_c, cpu_sr
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}
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}
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#endif
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static inline unsigned CPU_CLZ16(uint16_t val)
|
||||
{
|
||||
__asm volatile {
|
||||
CLZ val, val
|
||||
}
|
||||
return (val - 16);
|
||||
}
|
||||
|
||||
static inline uint8_t __swap_byte(uint8_t newval, uint8_t volatile* pmem)
|
||||
{
|
||||
uint8_t oldval;
|
||||
__asm volatile {
|
||||
SWPB oldval, newval, [pmem]
|
||||
};
|
||||
return oldval;
|
||||
}
|
||||
|
||||
static inline uint32_t UTL_REV32(uint32_t val)
|
||||
{
|
||||
uint32_t tmpval;
|
||||
__asm volatile {
|
||||
EOR tmpval, val, val, ROR #16
|
||||
MOV tmpval, tmpval, LSR #8
|
||||
BIC tmpval, tmpval, #0xFF00
|
||||
EOR val, tmpval, val, ROR #8
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
static inline uint16_t UTL_REV16(uint16_t val)
|
||||
{
|
||||
uint32_t tmpval;
|
||||
__asm volatile {
|
||||
LSR tmpval, val, #8
|
||||
ORR val, tmpval, val, LSL #8
|
||||
BIC val, val, #0xFF0000
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
#ifdef __SWITCH_TO_ARM__
|
||||
#undef __SWITCH_TO_ARM__
|
||||
#pragma thumb
|
||||
#endif
|
||||
|
||||
#ifndef COUNTOF
|
||||
#define COUNTOF(ar) (sizeof(ar)/sizeof(ar[0]))
|
||||
#endif
|
||||
/*
|
||||
void util_halt(void);
|
||||
void util_fastloop(ubase_t n);
|
||||
ubase_t util_getCPSR(void);
|
||||
ubase_t util_enter_critical(void);
|
||||
void util_exit_critical(ubase_t sr);
|
||||
void util_enable_interrupt(void);
|
||||
void util_disable_interrupt(void);
|
||||
|
||||
void target_wdt_setup(void);
|
||||
void target_wdt_feed(void);
|
||||
void target_reset(void);
|
||||
*/
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
#endif /* __TARGET_H__ */
|
||||
|
||||
@@ -0,0 +1,55 @@
|
||||
#ifndef __F1C100S_REG_CCU_H__
|
||||
#define __F1C100S_REG_CCU_H__
|
||||
|
||||
#define F1C100S_CCU_BASE (0x01c20000)
|
||||
|
||||
#define CCU_PLL_CPU_CTRL (0x000)
|
||||
#define CCU_PLL_AUDIO_CTRL (0x008)
|
||||
#define CCU_PLL_VIDEO_CTRL (0x010)
|
||||
#define CCU_PLL_VE_CTRL (0x018)
|
||||
#define CCU_PLL_DDR_CTRL (0x020)
|
||||
#define CCU_PLL_PERIPH_CTRL (0x028)
|
||||
#define CCU_CPU_CFG (0x050)
|
||||
#define CCU_AHB_APB_CFG (0x054)
|
||||
|
||||
#define CCU_BUS_CLK_GATE0 (0x060)
|
||||
#define CCU_BUS_CLK_GATE1 (0x064)
|
||||
#define CCU_BUS_CLK_GATE2 (0x068)
|
||||
|
||||
#define CCU_SDMMC0_CLK (0x088)
|
||||
#define CCU_SDMMC1_CLK (0x08c)
|
||||
#define CCU_DAUDIO_CLK (0x0b0)
|
||||
#define CCU_SPDIF_CLK (0x0b4)
|
||||
#define CCU_I2S_CLK (0x0b8)
|
||||
#define CCU_USBPHY_CFG (0x0cc)
|
||||
#define CCU_DRAM_CLK_GATE (0x100)
|
||||
#define CCU_DEBE_CLK (0x104)
|
||||
#define CCU_DEFE_CLK (0x10c)
|
||||
#define CCU_LCD_CLK (0x118)
|
||||
#define CCU_DEINTERLACE_CLK (0x11c)
|
||||
#define CCU_TVE_CLK (0x120)
|
||||
#define CCU_TVD_CLK (0x124)
|
||||
#define CCU_CSI_CLK (0x134)
|
||||
#define CCU_VE_CLK (0x13c)
|
||||
#define CCU_ADDA_CLK (0x140)
|
||||
#define CCU_AVS_CLK (0x144)
|
||||
|
||||
#define CCU_PLL_STABLE_TIME0 (0x200)
|
||||
#define CCU_PLL_STABLE_TIME1 (0x204)
|
||||
#define CCU_PLL_CPU_BIAS (0x220)
|
||||
#define CCU_PLL_AUDIO_BIAS (0x224)
|
||||
#define CCU_PLL_VIDEO_BIAS (0x228)
|
||||
#define CCU_PLL_VE_BIAS (0x22c)
|
||||
#define CCU_PLL_DDR0_BIAS (0x230)
|
||||
#define CCU_PLL_PERIPH_BIAS (0x234)
|
||||
#define CCU_PLL_CPU_TUN (0x250)
|
||||
#define CCU_PLL_DDR_TUN (0x260)
|
||||
#define CCU_PLL_AUDIO_PAT (0x284)
|
||||
#define CCU_PLL_VIDEO_PAT (0x288)
|
||||
#define CCU_PLL_DDR0_PAT (0x290)
|
||||
|
||||
#define CCU_BUS_SOFT_RST0 (0x2c0)
|
||||
#define CCU_BUS_SOFT_RST1 (0x2c4)
|
||||
#define CCU_BUS_SOFT_RST3 (0x2d0)
|
||||
|
||||
#endif /* __F1C100S_REG_CCU_H__ */
|
||||
@@ -0,0 +1,39 @@
|
||||
#ifndef __F1C100S_REG_DRAM_H__
|
||||
#define __F1C100S_REG_DRAM_H__
|
||||
|
||||
#define F1C100S_DRAM_BASE (0x01c01000)
|
||||
|
||||
#define DRAM_SCONR (0x00)
|
||||
#define DRAM_STMG0R (0x04)
|
||||
#define DRAM_STMG1R (0x08)
|
||||
#define DRAM_SCTLR (0x0c)
|
||||
#define DRAM_SREFR (0x10)
|
||||
#define DRAM_SEXTMR (0x14)
|
||||
#define DRAM_DDLYR (0x24)
|
||||
#define DRAM_DADRR (0x28)
|
||||
#define DRAM_DVALR (0x2c)
|
||||
#define DRAM_DRPTR0 (0x30)
|
||||
#define DRAM_DRPTR1 (0x34)
|
||||
#define DRAM_DRPTR2 (0x38)
|
||||
#define DRAM_DRPTR3 (0x3c)
|
||||
#define DRAM_SEFR (0x40)
|
||||
#define DRAM_MAE (0x44)
|
||||
#define DRAM_ASPR (0x48)
|
||||
#define DRAM_SDLY0 (0x4C)
|
||||
#define DRAM_SDLY1 (0x50)
|
||||
#define DRAM_SDLY2 (0x54)
|
||||
#define DRAM_MCR0 (0x100)
|
||||
#define DRAM_MCR1 (0x104)
|
||||
#define DRAM_MCR2 (0x108)
|
||||
#define DRAM_MCR3 (0x10c)
|
||||
#define DRAM_MCR4 (0x110)
|
||||
#define DRAM_MCR5 (0x114)
|
||||
#define DRAM_MCR6 (0x118)
|
||||
#define DRAM_MCR7 (0x11c)
|
||||
#define DRAM_MCR8 (0x120)
|
||||
#define DRAM_MCR9 (0x124)
|
||||
#define DRAM_MCR10 (0x128)
|
||||
#define DRAM_MCR11 (0x12c)
|
||||
#define DRAM_BWCR (0x140)
|
||||
|
||||
#endif /* __F1C100S_REG_DRAM_H__ */
|
||||
@@ -0,0 +1,57 @@
|
||||
#ifndef __IO_H__
|
||||
#define __IO_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <types.h>
|
||||
|
||||
static inline u8_t read8(virtual_addr_t addr)
|
||||
{
|
||||
return( *((volatile u8_t *)(addr)) );
|
||||
}
|
||||
|
||||
static inline u16_t read16(virtual_addr_t addr)
|
||||
{
|
||||
return( *((volatile u16_t *)(addr)) );
|
||||
}
|
||||
|
||||
static inline u32_t read32(virtual_addr_t addr)
|
||||
{
|
||||
return( *((volatile u32_t *)(addr)) );
|
||||
}
|
||||
|
||||
static inline u64_t read64(virtual_addr_t addr)
|
||||
{
|
||||
return( *((volatile u64_t *)(addr)) );
|
||||
}
|
||||
|
||||
static inline void write8(virtual_addr_t addr, u8_t value)
|
||||
{
|
||||
*((volatile u8_t *)(addr)) = value;
|
||||
}
|
||||
|
||||
static inline void write16(virtual_addr_t addr, u16_t value)
|
||||
{
|
||||
*((volatile u16_t *)(addr)) = value;
|
||||
}
|
||||
|
||||
static inline void write32(virtual_addr_t addr, u32_t value)
|
||||
{
|
||||
*((volatile u32_t *)(addr)) = value;
|
||||
}
|
||||
|
||||
static inline void write64(virtual_addr_t addr, u64_t value)
|
||||
{
|
||||
*((volatile u64_t *)(addr)) = value;
|
||||
}
|
||||
|
||||
virtual_addr_t phys_to_virt(physical_addr_t phys);
|
||||
physical_addr_t virt_to_phys(virtual_addr_t virt);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __IO_H__ */
|
||||
@@ -0,0 +1,104 @@
|
||||
#ifndef __ARM32_IRQFLAGS_H__
|
||||
#define __ARM32_IRQFLAGS_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <types.h>
|
||||
|
||||
#if __ARM32_ARCH__ == 5
|
||||
|
||||
static inline void arch_local_irq_enable(void)
|
||||
{
|
||||
irq_flags_t temp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"mrs %0, cpsr\n"
|
||||
"bic %0, %0, #(1<<7)\n"
|
||||
"msr cpsr_c, %0"
|
||||
: "=r" (temp)
|
||||
:
|
||||
: "memory", "cc");
|
||||
}
|
||||
|
||||
static inline void arch_local_irq_disable(void)
|
||||
{
|
||||
irq_flags_t temp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"mrs %0, cpsr\n"
|
||||
"orr %0, %0, #(1<<7)\n"
|
||||
"msr cpsr_c, %0"
|
||||
: "=r" (temp)
|
||||
:
|
||||
: "memory", "cc");
|
||||
}
|
||||
|
||||
static inline irq_flags_t arch_local_irq_save(void)
|
||||
{
|
||||
irq_flags_t flags, temp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"mrs %0, cpsr\n"
|
||||
"orr %1, %0, #(1<<7)\n"
|
||||
"msr cpsr_c, %1"
|
||||
: "=r" (flags), "=r" (temp)
|
||||
:
|
||||
: "memory", "cc");
|
||||
|
||||
return flags;
|
||||
}
|
||||
|
||||
static inline void arch_local_irq_restore(irq_flags_t flags)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"msr cpsr_c, %0"
|
||||
:
|
||||
: "r" (flags)
|
||||
: "memory", "cc");
|
||||
}
|
||||
#else
|
||||
static inline void arch_local_irq_enable(void)
|
||||
{
|
||||
__asm__ __volatile__("cpsie i" ::: "memory", "cc");
|
||||
}
|
||||
|
||||
static inline void arch_local_irq_disable(void)
|
||||
{
|
||||
__asm__ __volatile__("cpsid i" ::: "memory", "cc");
|
||||
}
|
||||
|
||||
static inline irq_flags_t arch_local_irq_save(void)
|
||||
{
|
||||
irq_flags_t flags;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"mrs %0, cpsr\n"
|
||||
"cpsid i"
|
||||
: "=r" (flags)
|
||||
:
|
||||
: "memory", "cc");
|
||||
return flags;
|
||||
}
|
||||
|
||||
static inline void arch_local_irq_restore(irq_flags_t flags)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"msr cpsr_c, %0"
|
||||
:
|
||||
: "r" (flags)
|
||||
: "memory", "cc");
|
||||
}
|
||||
#endif
|
||||
|
||||
#define local_irq_enable() do { arch_local_irq_enable(); } while(0)
|
||||
#define local_irq_disable() do { arch_local_irq_disable(); } while(0)
|
||||
#define local_irq_save(flags) do { flags = arch_local_irq_save(); } while(0)
|
||||
#define local_irq_restore(flags) do { arch_local_irq_restore(flags); } while(0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ARM32_IRQFLAGS_H__ */
|
||||
@@ -0,0 +1,35 @@
|
||||
#ifndef __MALLOC_H__
|
||||
#define __MALLOC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <types.h>
|
||||
#include <stddef.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
|
||||
void * mm_create(void * mem, size_t bytes);
|
||||
void mm_destroy(void * mm);
|
||||
void * mm_get_pool(void * mm);
|
||||
void * mm_add_pool(void * mm, void * mem, size_t bytes);
|
||||
void mm_remove_pool(void * mm, void * pool);
|
||||
void * mm_malloc(void * mm, size_t size);
|
||||
void * mm_memalign(void * mm, size_t align, size_t size);
|
||||
void * mm_realloc(void * mm, void * ptr, size_t size);
|
||||
void mm_free(void * mm, void * ptr);
|
||||
|
||||
void * malloc(size_t size);
|
||||
void * memalign(size_t align, size_t size);
|
||||
void * realloc(void * ptr, size_t size);
|
||||
void * calloc(size_t nmemb, size_t size);
|
||||
void free(void * ptr);
|
||||
|
||||
void do_init_mem_pool(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MALLOC_H__ */
|
||||
@@ -0,0 +1,99 @@
|
||||
///////////////////////////////////////////////////////////////////////////////
|
||||
// \author (c) Marco Paland (info@paland.com)
|
||||
// 2014-2018, PALANDesign Hannover, Germany
|
||||
//
|
||||
// \license The MIT License (MIT)
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
// of this software and associated documentation files (the "Software"), to deal
|
||||
// in the Software without restriction, including without limitation the rights
|
||||
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
// copies of the Software, and to permit persons to whom the Software is
|
||||
// furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in
|
||||
// all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
// THE SOFTWARE.
|
||||
//
|
||||
// \brief Tiny printf, sprintf and snprintf implementation, optimized for speed on
|
||||
// embedded systems with a very limited resources.
|
||||
// Use this instead of bloated standard/newlib printf.
|
||||
// These routines are thread safe and reentrant!
|
||||
//
|
||||
///////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#ifndef _PRINTF_H_
|
||||
#define _PRINTF_H_
|
||||
|
||||
#include <stdarg.h>
|
||||
#include <stddef.h>
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* Output a character to a custom device like UART, used by the printf() function
|
||||
* This function is declared here only. You have to write your custom implementation somewhere
|
||||
* \param character Character to output
|
||||
*/
|
||||
void _putchar(char character);
|
||||
|
||||
|
||||
/**
|
||||
* Tiny printf implementation
|
||||
* You have to implement _putchar if you use printf()
|
||||
* \param format A string that specifies the format of the output
|
||||
* \return The number of characters that are written into the array, not counting the terminating null character
|
||||
*/
|
||||
int printf(const char* format, ...);
|
||||
|
||||
|
||||
/**
|
||||
* Tiny sprintf implementation
|
||||
* Due to security reasons (buffer overflow) YOU SHOULD CONSIDER USING (V)SNPRINTF INSTEAD!
|
||||
* \param buffer A pointer to the buffer where to store the formatted string. MUST be big enough to store the output!
|
||||
* \param format A string that specifies the format of the output
|
||||
* \return The number of characters that are WRITTEN into the buffer, not counting the terminating null character
|
||||
*/
|
||||
int sprintf(char* buffer, const char* format, ...);
|
||||
|
||||
|
||||
/**
|
||||
* Tiny snprintf/vsnprintf implementation
|
||||
* \param buffer A pointer to the buffer where to store the formatted string
|
||||
* \param count The maximum number of characters to store in the buffer, including a terminating null character
|
||||
* \param format A string that specifies the format of the output
|
||||
* \return The number of characters that are WRITTEN into the buffer, not counting the terminating null character
|
||||
* If the formatted string is truncated the buffer size (count) is returned
|
||||
*/
|
||||
int snprintf(char* buffer, size_t count, const char* format, ...);
|
||||
int vsnprintf(char* buffer, size_t count, const char* format, va_list va);
|
||||
|
||||
|
||||
/**
|
||||
* printf with output function
|
||||
* You may use this as dynamic alternative to printf() with its fixed _putchar() output
|
||||
* \param out An output function which takes one character and an argument pointer
|
||||
* \param arg An argument pointer for user data passed to output function
|
||||
* \param format A string that specifies the format of the output
|
||||
* \return The number of characters that are sent to the output function, not counting the terminating null character
|
||||
*/
|
||||
int fctprintf(void (*out)(char character, void* arg), void* arg, const char* format, ...);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif // _PRINTF_H_
|
||||
@@ -0,0 +1,42 @@
|
||||
#ifndef __SIZES_H__
|
||||
#define __SIZES_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define SZ_16 (0x00000010)
|
||||
#define SZ_256 (0x00000100)
|
||||
#define SZ_512 (0x00000200)
|
||||
|
||||
#define SZ_1K (0x00000400)
|
||||
#define SZ_4K (0x00001000)
|
||||
#define SZ_8K (0x00002000)
|
||||
#define SZ_16K (0x00004000)
|
||||
#define SZ_32K (0x00008000)
|
||||
#define SZ_64K (0x00010000)
|
||||
#define SZ_128K (0x00020000)
|
||||
#define SZ_256K (0x00040000)
|
||||
#define SZ_512K (0x00080000)
|
||||
|
||||
#define SZ_1M (0x00100000)
|
||||
#define SZ_2M (0x00200000)
|
||||
#define SZ_4M (0x00400000)
|
||||
#define SZ_8M (0x00800000)
|
||||
#define SZ_16M (0x01000000)
|
||||
#define SZ_32M (0x02000000)
|
||||
#define SZ_64M (0x04000000)
|
||||
#define SZ_128M (0x08000000)
|
||||
#define SZ_256M (0x10000000)
|
||||
#define SZ_512M (0x20000000)
|
||||
|
||||
#define SZ_1G (0x40000000)
|
||||
#define SZ_2G (0x80000000)
|
||||
|
||||
#define ARRAY_SIZE(array) ( sizeof(array) / sizeof((array)[0]) )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SIZES_H__ */
|
||||
@@ -0,0 +1,55 @@
|
||||
#ifndef __ARM32_TYPES_H__
|
||||
#define __ARM32_TYPES_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef signed char s8_t;
|
||||
typedef unsigned char u8_t;
|
||||
|
||||
typedef signed short s16_t;
|
||||
typedef unsigned short u16_t;
|
||||
|
||||
typedef signed int s32_t;
|
||||
typedef unsigned int u32_t;
|
||||
|
||||
typedef signed long long s64_t;
|
||||
typedef unsigned long long u64_t;
|
||||
|
||||
typedef signed long long intmax_t;
|
||||
typedef unsigned long long uintmax_t;
|
||||
|
||||
typedef signed int ptrdiff_t;
|
||||
typedef signed int intptr_t;
|
||||
typedef unsigned int uintptr_t;
|
||||
|
||||
typedef unsigned int size_t;
|
||||
typedef signed int ssize_t;
|
||||
|
||||
// typedef signed int off_t;
|
||||
typedef signed long long loff_t;
|
||||
|
||||
typedef signed int bool_t;
|
||||
|
||||
typedef signed int register_t;
|
||||
typedef unsigned int irq_flags_t;
|
||||
|
||||
typedef unsigned int virtual_addr_t;
|
||||
typedef unsigned int virtual_size_t;
|
||||
typedef unsigned int physical_addr_t;
|
||||
typedef unsigned int physical_size_t;
|
||||
|
||||
typedef struct {
|
||||
volatile long counter;
|
||||
} atomic_t;
|
||||
|
||||
typedef struct {
|
||||
volatile long lock;
|
||||
} spinlock_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ARM32_TYPES_H__ */
|
||||
Reference in New Issue
Block a user