remove dcd_edpt_busy()
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@@ -67,15 +67,19 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
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{
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return false;
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}
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bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{ return false;}
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bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr)
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{ return false;}
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{
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return false;
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}
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void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
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{}
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{
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}
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void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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{}
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{
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}
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#endif
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@@ -397,32 +397,6 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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}
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}
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bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr)
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{
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(void) rhport;
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USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE;
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USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE;
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// USBD shouldn't check control endpoint state
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if ( 0 == ep_addr ) return false;
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uint8_t const epnum = tu_edpt_number(ep_addr);
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bool enabled = false;
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bool xferring = true;
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if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
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enabled = (in_ep[epnum].DIEPCTL & USB_OTG_DIEPCTL_EPENA_Msk);
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xferring = (in_ep[epnum].DIEPTSIZ & USB_OTG_DIEPTSIZ_PKTCNT_Msk);
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} else {
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enabled = (out_ep[epnum].DOEPCTL & USB_OTG_DOEPCTL_EPENA_Msk);
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xferring = (out_ep[epnum].DOEPTSIZ & USB_OTG_DOEPTSIZ_PKTCNT_Msk);
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}
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// TODO: Also check that endpoint is active (not just enabled)?
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return (enabled && xferring);
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}
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/*------------------------------------------------------------------*/
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// TODO: Split into "receive on endpoint 0" and "receive generic"; endpoint 0's
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