Merge pull request #1495 from hathach/enhance-tusb-config

Better support multiple controllers configuration
This commit is contained in:
Ha Thach
2022-06-07 01:13:08 +07:00
committed by GitHub
90 changed files with 1109 additions and 878 deletions
@@ -81,7 +81,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
// Init values // Init values
sampFreq = AUDIO_SAMPLE_RATE; sampFreq = AUDIO_SAMPLE_RATE;
@@ -30,6 +30,20 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -39,18 +53,19 @@ extern "C" {
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif #endif
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
#ifndef CFG_TUSB_DEBUG #ifndef CFG_TUSB_DEBUG
#define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build // Enable Device stack
// #define CFG_TUSB_DEBUG 0 #define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -64,7 +79,7 @@ extern "C" {
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -76,11 +91,11 @@ extern "C" {
#endif #endif
//------------- CLASS -------------// //------------- CLASS -------------//
#define CFG_TUD_AUDIO 1
#define CFG_TUD_CDC 0 #define CFG_TUD_CDC 0
#define CFG_TUD_MSC 0 #define CFG_TUD_MSC 0
#define CFG_TUD_HID 0 #define CFG_TUD_HID 0
#define CFG_TUD_MIDI 0 #define CFG_TUD_MIDI 0
#define CFG_TUD_AUDIO 1
#define CFG_TUD_VENDOR 0 #define CFG_TUD_VENDOR 0
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -89,23 +104,23 @@ extern "C" {
// Have a look into audio_device.h for all configurations // Have a look into audio_device.h for all configurations
#define CFG_TUD_AUDIO_FUNC_1_DESC_LEN TUD_AUDIO_MIC_FOUR_CH_DESC_LEN #define CFG_TUD_AUDIO_FUNC_1_DESC_LEN TUD_AUDIO_MIC_FOUR_CH_DESC_LEN
#define CFG_TUD_AUDIO_FUNC_1_N_AS_INT 1 #define CFG_TUD_AUDIO_FUNC_1_N_AS_INT 1
#define CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ 64 #define CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ 64
#define CFG_TUD_AUDIO_ENABLE_EP_IN 1 #define CFG_TUD_AUDIO_ENABLE_EP_IN 1
#define CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX 2 // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup #define CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX 2 // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
#define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX 4 // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup #define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX 4 // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
#define CFG_TUD_AUDIO_EP_SZ_IN (48 + 1) * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX // 48 Samples (48 kHz) x 2 Bytes/Sample x CFG_TUD_AUDIO_N_CHANNELS_TX Channels - the Windows driver always needs an extra sample per channel of space more, otherwise it complains... found by trial and error #define CFG_TUD_AUDIO_EP_SZ_IN (48 + 1) * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX // 48 Samples (48 kHz) x 2 Bytes/Sample x CFG_TUD_AUDIO_N_CHANNELS_TX Channels - the Windows driver always needs an extra sample per channel of space more, otherwise it complains... found by trial and error
#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX CFG_TUD_AUDIO_EP_SZ_IN #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX CFG_TUD_AUDIO_EP_SZ_IN
#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ CFG_TUD_AUDIO_EP_SZ_IN #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ CFG_TUD_AUDIO_EP_SZ_IN
#define CFG_TUD_AUDIO_ENABLE_ENCODING 1 #define CFG_TUD_AUDIO_ENABLE_ENCODING 1
#define CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING 1 #define CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING 1
#define CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX 2 // One I2S stream contains two channels, each stream is saved within one support FIFO - this value is currently fixed, the driver does not support a changing value #define CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX 2 // One I2S stream contains two channels, each stream is saved within one support FIFO - this value is currently fixed, the driver does not support a changing value
#define CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO (CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX / CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX) #define CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO (CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX / CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX)
#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ (CFG_TUD_AUDIO_EP_SZ_IN / CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO) #define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ (CFG_TUD_AUDIO_EP_SZ_IN / CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO)
#ifdef __cplusplus #ifdef __cplusplus
} }
+2 -1
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@@ -82,7 +82,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
// Init values // Init values
sampFreq = AUDIO_SAMPLE_RATE; sampFreq = AUDIO_SAMPLE_RATE;
+21 -3
View File
@@ -30,6 +30,20 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -39,8 +53,6 @@ extern "C" {
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif #endif
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
@@ -49,6 +61,12 @@ extern "C" {
#define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif #endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build // CFG_TUSB_DEBUG is defined by compiler in DEBUG build
// #define CFG_TUSB_DEBUG 0 // #define CFG_TUSB_DEBUG 0
@@ -76,11 +94,11 @@ extern "C" {
#endif #endif
//------------- CLASS -------------// //------------- CLASS -------------//
#define CFG_TUD_AUDIO 1
#define CFG_TUD_CDC 0 #define CFG_TUD_CDC 0
#define CFG_TUD_MSC 0 #define CFG_TUD_MSC 0
#define CFG_TUD_HID 0 #define CFG_TUD_HID 0
#define CFG_TUD_MIDI 0 #define CFG_TUD_MIDI 0
#define CFG_TUD_AUDIO 1
#define CFG_TUD_VENDOR 0 #define CFG_TUD_VENDOR 0
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+3 -16
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@@ -43,7 +43,9 @@
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_NONE // This example only test LED & GPIO, disable both device and host stack
#define CFG_TUD_ENABLED 0
#define CFG_TUH_ENABLED 0
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build // CFG_TUSB_DEBUG is defined by compiler in DEBUG build
// #define CFG_TUSB_DEBUG 0 // #define CFG_TUSB_DEBUG 0
@@ -63,21 +65,6 @@
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//--------------------------------------------------------------------
// DEVICE CONFIGURATION
//--------------------------------------------------------------------
#ifndef CFG_TUD_ENDPOINT0_SIZE
#define CFG_TUD_ENDPOINT0_SIZE 64
#endif
//------------- CLASS -------------//
#define CFG_TUD_CDC 0
#define CFG_TUD_MSC 0
#define CFG_TUD_HID 0
#define CFG_TUD_MIDI 0
#define CFG_TUD_VENDOR 0
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
+2 -1
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@@ -39,7 +39,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by board.mk
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
+3 -1
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@@ -54,7 +54,9 @@ void cdc_task(void);
int main(void) int main(void)
{ {
board_init(); board_init();
tusb_init();
// init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+25 -25
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@@ -30,42 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// COMMON CONFIGURATION // Board Specific Configuration
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// defined by board.mk
#ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0 // RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM #ifndef BOARD_TUD_RHPORT
#define BOARD_DEVICE_RHPORT_NUM 0 #define BOARD_TUD_RHPORT 0
#endif #endif
// RHPort max operational speed can defined by board.mk // RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY #ifndef BOARD_TUD_MAX_SPEED
#ifndef BOARD_DEVICE_RHPORT_SPEED #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif #endif
// Device mode with rhport and speed defined by board.mk //--------------------------------------------------------------------
#if BOARD_DEVICE_RHPORT_NUM == 0 // Common Configuration
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) //--------------------------------------------------------------------
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) // defined by compiler flags for flexibility
#else #ifndef CFG_TUSB_MCU
#error "Incorrect RHPort configuration" #error CFG_TUSB_MCU must be defined
#endif #endif
// This example doesn't use an RTOS
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -79,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+2 -1
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@@ -123,9 +123,10 @@ void usb_device_task(void* param)
{ {
(void) param; (void) param;
// init device stack on configured roothub port
// This should be called after scheduler/kernel is started. // This should be called after scheduler/kernel is started.
// Otherwise it could cause kernel issue since USB IRQ handler does use RTOS queue API. // Otherwise it could cause kernel issue since USB IRQ handler does use RTOS queue API.
tusb_init(); tud_init(BOARD_TUD_RHPORT);
// RTOS forever loop // RTOS forever loop
while (1) while (1)
@@ -30,53 +30,48 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by board.mk
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise FullSpeed
#ifndef BOARD_DEVICE_RHPORT_SPEED
#if (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \
CFG_TUSB_MCU == OPT_MCU_NUC505 || CFG_TUSB_MCU == OPT_MCU_CXD56)
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED
#else
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED
#endif
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
// This examples use FreeRTOS // This examples use FreeRTOS
#define CFG_TUSB_OS OPT_OS_FREERTOS #define CFG_TUSB_OS OPT_OS_FREERTOS
// Espressif IDF requires "freertos/" prefix in include path // Espressif IDF requires "freertos/" prefix in include path
#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
#define CFG_TUSB_OS_INC_PATH freertos/ #define CFG_TUSB_OS_INC_PATH freertos/
#endif #endif
// can be defined by compiler in DEBUG build // can be defined by compiler in DEBUG build
#ifndef CFG_TUSB_DEBUG #ifndef CFG_TUSB_DEBUG
#define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif #endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
* into those specific section. * into those specific section.
@@ -89,7 +84,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -97,7 +92,7 @@
//-------------------------------------------------------------------- //--------------------------------------------------------------------
#ifndef CFG_TUD_ENDPOINT0_SIZE #ifndef CFG_TUD_ENDPOINT0_SIZE
#define CFG_TUD_ENDPOINT0_SIZE 64 #define CFG_TUD_ENDPOINT0_SIZE 64
#endif #endif
//------------- CLASS -------------// //------------- CLASS -------------//
+2 -1
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@@ -74,7 +74,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+29 -28
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@@ -12,41 +12,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -60,7 +61,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -72,10 +73,10 @@
#endif #endif
//------------- CLASS -------------// //------------- CLASS -------------//
#define CFG_TUD_DFU 1 #define CFG_TUD_DFU 1
// DFU buffer size, it has to be set to the buffer size used in TUD_DFU_DESCRIPTOR // DFU buffer size, it has to be set to the buffer size used in TUD_DFU_DESCRIPTOR
#define CFG_TUD_DFU_XFER_BUFSIZE ( OPT_MODE_HIGH_SPEED ? 512 : 64 ) #define CFG_TUD_DFU_XFER_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#ifdef __cplusplus #ifdef __cplusplus
} }
+2 -1
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@@ -69,7 +69,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+26 -25
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@@ -12,41 +12,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -55,7 +55,9 @@ void midi_task(void);
int main(void) int main(void)
{ {
board_init(); board_init();
tusb_init();
// init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -78,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -55,7 +55,9 @@ void hid_task(void);
int main(void) int main(void)
{ {
board_init(); board_init();
tusb_init();
// init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
@@ -30,45 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// Use raspberry pio-usb for device
// #define CFG_TUD_RPI_PIO_USB 1
// #define BOARD_DEVICE_RHPORT_NUM 1
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -82,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+3 -1
View File
@@ -56,7 +56,9 @@ void hid_task(void);
int main(void) int main(void)
{ {
board_init(); board_init();
tusb_init();
// init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+26 -25
View File
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -125,9 +125,10 @@ void usb_device_task(void* param)
{ {
(void) param; (void) param;
// init device stack on configured roothub port
// This should be called after scheduler/kernel is started. // This should be called after scheduler/kernel is started.
// Otherwise it could cause kernel issue since USB IRQ handler does use RTOS queue API. // Otherwise it could cause kernel issue since USB IRQ handler does use RTOS queue API.
tusb_init(); tud_init(BOARD_TUD_RHPORT);
// RTOS forever loop // RTOS forever loop
while (1) while (1)
@@ -30,48 +30,48 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by board.mk
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
// This examples use FreeRTOS // This examples use FreeRTOS
#define CFG_TUSB_OS OPT_OS_FREERTOS #define CFG_TUSB_OS OPT_OS_FREERTOS
// Espressif IDF requires "freertos/" prefix in include path // Espressif IDF requires "freertos/" prefix in include path
#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
#define CFG_TUSB_OS_INC_PATH freertos/ #define CFG_TUSB_OS_INC_PATH freertos/
#endif #endif
// can be defined by compiler in DEBUG build
#ifndef CFG_TUSB_DEBUG #ifndef CFG_TUSB_DEBUG
#define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif #endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
* into those specific section. * into those specific section.
+2 -1
View File
@@ -80,7 +80,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -78,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -60,7 +60,9 @@ void hid_task(void);
int main(void) int main(void)
{ {
board_init(); board_init();
tusb_init();
// init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
+2 -1
View File
@@ -62,7 +62,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+27 -26
View File
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -78,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+2 -1
View File
@@ -54,7 +54,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+27 -26
View File
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY
#ifndef BOARD_DEVICE_RHPORT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -78,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -228,7 +228,9 @@ int main(void)
{ {
/* initialize TinyUSB */ /* initialize TinyUSB */
board_init(); board_init();
tusb_init();
// init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
/* initialize lwip, dhcp-server, dns-server, and http */ /* initialize lwip, dhcp-server, dns-server, and http */
init_lwip(); init_lwip();
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// COMMON CONFIGURATION // Board Specific Configuration
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// defined by board.mk
#ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0 // RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM #ifndef BOARD_TUD_RHPORT
#define BOARD_DEVICE_RHPORT_NUM 0 #define BOARD_TUD_RHPORT 0
#endif #endif
// RHPort max operational speed can defined by board.mk // RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY #ifndef BOARD_TUD_MAX_SPEED
#ifndef BOARD_DEVICE_RHPORT_SPEED #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif #endif
// Device mode with rhport and speed defined by board.mk //--------------------------------------------------------------------
#if BOARD_DEVICE_RHPORT_NUM == 0 // Common Configuration
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) //--------------------------------------------------------------------
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) // defined by compiler flags for flexibility
#else #ifndef CFG_TUSB_MCU
#error "Incorrect RHPort configuration" #error CFG_TUSB_MCU must be defined
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -78,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+2 -1
View File
@@ -102,7 +102,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
TU_LOG1("Headset running\r\n"); TU_LOG1("Headset running\r\n");
+27 -12
View File
@@ -31,30 +31,45 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------
// COMMON CONFIGURATION
//--------------------------------------------------------------------
#include "usb_descriptors.h" #include "usb_descriptors.h"
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//--------------------------------------------------------------------
// Common Configuration
//--------------------------------------------------------------------
// defined by compiler flags for flexibility // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif #endif
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
#ifndef CFG_TUSB_DEBUG #ifndef CFG_TUSB_DEBUG
// Can be set during compilation i.e.: make LOG=<value for CFG_TUSB_DEBUG> BOARD=<bsp> #define CFG_TUSB_DEBUG 0
// Keep in mind that enabling logs when data is streaming can disrupt data flow.
// It can be very helpful though when audio unit requests are tested/debugged.
#define CFG_TUSB_DEBUG 0
#endif #endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
* into those specific section. * into those specific section.
@@ -67,7 +82,7 @@ extern "C" {
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+2 -1
View File
@@ -54,7 +54,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+25 -24
View File
@@ -12,41 +12,42 @@
extern "C" { extern "C" {
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// COMMON CONFIGURATION // Board Specific Configuration
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// defined by board.mk
#ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0 // RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM #ifndef BOARD_TUD_RHPORT
#define BOARD_DEVICE_RHPORT_NUM 0 #define BOARD_TUD_RHPORT 0
#endif #endif
// RHPort max operational speed can defined by board.mk // RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY #ifndef BOARD_TUD_MAX_SPEED
#ifndef BOARD_DEVICE_RHPORT_SPEED #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif #endif
// Device mode with rhport and speed defined by board.mk //--------------------------------------------------------------------
#if BOARD_DEVICE_RHPORT_NUM == 0 // Common Configuration
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) //--------------------------------------------------------------------
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) // defined by compiler flags for flexibility
#else #ifndef CFG_TUSB_MCU
#error "Incorrect RHPort configuration" #error CFG_TUSB_MCU must be defined
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -60,7 +61,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+3 -1
View File
@@ -55,7 +55,9 @@ void video_task(void);
int main(void) int main(void)
{ {
board_init(); board_init();
tusb_init();
// init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+25 -20
View File
@@ -30,37 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// COMMON CONFIGURATION // Board Specific Configuration
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0 // RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM #ifndef BOARD_TUD_RHPORT
#define BOARD_DEVICE_RHPORT_NUM 0 #define BOARD_TUD_RHPORT 0
#endif #endif
// RHPort max operational speed can defined by board.mk // RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY #ifndef BOARD_TUD_MAX_SPEED
#ifndef BOARD_DEVICE_RHPORT_SPEED #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif #endif
// Device mode with rhport and speed defined by board.mk //--------------------------------------------------------------------
#if BOARD_DEVICE_RHPORT_NUM == 0 // Common Configuration
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) //--------------------------------------------------------------------
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) // defined by compiler flags for flexibility
#else #ifndef CFG_TUSB_MCU
#error "Incorrect RHPort configuration" #error CFG_TUSB_MCU must be defined
#endif #endif
// This example doesn't use an RTOS
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -74,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+2 -1
View File
@@ -93,7 +93,8 @@ int main(void)
{ {
board_init(); board_init();
tusb_init(); // init device stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
while (1) while (1)
{ {
+25 -24
View File
@@ -30,41 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// COMMON CONFIGURATION // Board Specific Configuration
//-------------------------------------------------------------------- //--------------------------------------------------------------------+
// defined by board.mk
#ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined
#endif
// RHPort number used for device can be defined by board.mk, default to port 0 // RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM #ifndef BOARD_TUD_RHPORT
#define BOARD_DEVICE_RHPORT_NUM 0 #define BOARD_TUD_RHPORT 0
#endif #endif
// RHPort max operational speed can defined by board.mk // RHPort max operational speed can defined by board.mk
// Default to max (auto) speed for MCU with internal HighSpeed PHY #ifndef BOARD_TUD_MAX_SPEED
#ifndef BOARD_DEVICE_RHPORT_SPEED #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED
#endif #endif
// Device mode with rhport and speed defined by board.mk //--------------------------------------------------------------------
#if BOARD_DEVICE_RHPORT_NUM == 0 // Common Configuration
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) //--------------------------------------------------------------------
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) // defined by compiler flags for flexibility
#else #ifndef CFG_TUSB_MCU
#error "Incorrect RHPort configuration" #error CFG_TUSB_MCU must be defined
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack
#define CFG_TUD_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
@@ -78,7 +79,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
@@ -79,7 +79,9 @@ int main(void)
printf("TinyUSB Host HID <-> Device CDC Example\r\n"); printf("TinyUSB Host HID <-> Device CDC Example\r\n");
tusb_init(); // init device and host stack on configured roothub port
tud_init(BOARD_TUD_RHPORT);
tuh_init(BOARD_TUH_RHPORT);
while (1) while (1)
{ {
@@ -30,75 +30,61 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_TUD_RHPORT
#define BOARD_TUD_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUD_MAX_SPEED
#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
// RHPort number used for host can be defined by board.mk, default to port 1
#ifndef BOARD_TUH_RHPORT
#define BOARD_TUH_RHPORT 1
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUH_MAX_SPEED
#define BOARD_TUH_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by board.mk // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif #endif
// RHPort number used for device can be defined by board.mk, default to port 0
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 0
#endif
// RHPort number used for device can be defined by board.mk, default to port 1
#ifndef BOARD_HOST_RHPORT_NUM
#define BOARD_HOST_RHPORT_NUM 1
#endif
// Use raspberry pio-usb for host
#define CFG_TUH_RPI_PIO_USB 1
// RHPort max operational speed can defined by board.mk
// Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise FullSpeed
#ifndef BOARD_DEVICE_RHPORT_SPEED
#if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX, OPT_MCU_MIMXRT10XX, OPT_MCU_NUC505) ||\
TU_CHECK_MCU(OPT_MCU_CXD56, OPT_MCU_SAMX7X, OPT_MCU_BCM2711) ||\
TU_CHECK_MCU(OPT_MCU_FT90X, OPT_MCU_FT93X)
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED
#else
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED
#endif
#endif
// RHPort max operational speed can defined by board.mk
// Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise FullSpeed
#ifndef BOARD_HOST_RHPORT_SPEED
#if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX, OPT_MCU_MIMXRT10XX, OPT_MCU_NUC505) ||\
TU_CHECK_MCU(OPT_MCU_CXD56, OPT_MCU_SAMX7X, OPT_MCU_BCM2711) ||\
TU_CHECK_MCU(OPT_MCU_FT90X, OPT_MCU_FT93X)
#define BOARD_HOST_RHPORT_SPEED OPT_MODE_HIGH_SPEED
#else
#define BOARD_HOST_RHPORT_SPEED OPT_MODE_FULL_SPEED
#endif
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_DEVICE_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#elif BOARD_DEVICE_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif
// Device mode with rhport and speed defined by board.mk
#if BOARD_HOST_RHPORT_NUM == 0
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | BOARD_HOST_RHPORT_SPEED)
#elif BOARD_HOST_RHPORT_NUM == 1
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_HOST | BOARD_HOST_RHPORT_SPEED)
#else
#error "Incorrect RHPort configuration"
#endif
// This example doesn't use an RTOS
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
#ifndef CFG_TUSB_DEBUG
#define CFG_TUSB_DEBUG 0
#endif
// Enable Device stack, Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUD_ENABLED 1
#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED
// Enable Host stack, Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUH_ENABLED 1
#define CFG_TUH_MAX_SPEED BOARD_TUH_MAX_SPEED
#if CFG_TUSB_MCU == OPT_MCU_RP2040
// Use pico-pio-usb as host controller for raspberry rp2040
#define CFG_TUH_RPI_PIO_USB 1
#endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build // CFG_TUSB_DEBUG is defined by compiler in DEBUG build
// #define CFG_TUSB_DEBUG 0 // #define CFG_TUSB_DEBUG 0
@@ -114,7 +100,7 @@
#endif #endif
#ifndef CFG_TUSB_MEM_ALIGN #ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) #define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
#endif #endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
+4 -2
View File
@@ -62,8 +62,10 @@ int main(void)
{ {
board_init(); board_init();
printf("TinyUSB Host HID Controller Example\r\n"); printf("TinyUSB Bare API Example\r\n");
tusb_init();
// init host stack on configured roothub port
tuh_init(BOARD_TUH_RHPORT);
while (1) while (1)
{ {
+25 -10
View File
@@ -30,27 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for host can be defined by board.mk, default to port 0
#ifndef BOARD_TUH_RHPORT
#define BOARD_TUH_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUH_MAX_SPEED
#define BOARD_TUH_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by compiler flags for flexibility // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED)
#else
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_HOST
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Host stack
#define CFG_TUH_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUH_MAX_SPEED BOARD_TUH_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
+2 -1
View File
@@ -45,7 +45,8 @@ int main(void)
printf("TinyUSB Host CDC MSC HID Example\r\n"); printf("TinyUSB Host CDC MSC HID Example\r\n");
tusb_init(); // init host stack on configured roothub port
tuh_init(BOARD_TUH_RHPORT);
while (1) while (1)
{ {
+25 -17
View File
@@ -30,34 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for host can be defined by board.mk, default to port 0
#ifndef BOARD_TUH_RHPORT
#define BOARD_TUH_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUH_MAX_SPEED
#define BOARD_TUH_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by compiler flags for flexibility // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
// Use raspberry pio-usb for host
// #define CFG_TUH_RPI_PIO_USB 1
// #define CFG_TUH_RPI_PIO_USB 1
#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED)
#elif defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB
// rp2040: port0 is native, port 1 for PIO-USB
#define CFG_TUSB_RHPORT1_MODE OPT_MODE_HOST
#else
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_HOST
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Host stack
#define CFG_TUH_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUH_MAX_SPEED BOARD_TUH_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
+3 -2
View File
@@ -49,9 +49,10 @@ int main(void)
board_init(); board_init();
printf("TinyUSB Host HID Controller Example\r\n"); printf("TinyUSB Host HID Controller Example\r\n");
printf("Note: Events only displayed for explictly supported controllers\r\n"); printf("Note: Events only displayed for explicit supported controllers\r\n");
tusb_init(); // init host stack on configured roothub port
tuh_init(BOARD_TUH_RHPORT);
while (1) while (1)
{ {
+25 -10
View File
@@ -30,27 +30,42 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Board Specific Configuration
//--------------------------------------------------------------------+
// RHPort number used for host can be defined by board.mk, default to port 0
#ifndef BOARD_TUH_RHPORT
#define BOARD_TUH_RHPORT 0
#endif
// RHPort max operational speed can defined by board.mk
#ifndef BOARD_TUH_MAX_SPEED
#define BOARD_TUH_MAX_SPEED OPT_MODE_DEFAULT_SPEED
#endif
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// COMMON CONFIGURATION // COMMON CONFIGURATION
//-------------------------------------------------------------------- //--------------------------------------------------------------------
// defined by compiler flags for flexibility // defined by compiler flags for flexibility
#ifndef CFG_TUSB_MCU #ifndef CFG_TUSB_MCU
#error CFG_TUSB_MCU must be defined #error CFG_TUSB_MCU must be defined
#endif
#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED)
#else
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_HOST
#endif #endif
#ifndef CFG_TUSB_OS #ifndef CFG_TUSB_OS
#define CFG_TUSB_OS OPT_OS_NONE #define CFG_TUSB_OS OPT_OS_NONE
#endif #endif
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG
// #define CFG_TUSB_DEBUG 0 #define CFG_TUSB_DEBUG 0
#endif
// Enable Host stack
#define CFG_TUH_ENABLED 1
// Default is max speed that hardware controller could support with on-chip PHY
#define CFG_TUH_MAX_SPEED BOARD_TUH_MAX_SPEED
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put * Tinyusb use follows macros to declare transferring memory so that they can be put
+3 -3
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@@ -32,11 +32,11 @@
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void USB_IRQHandler(void) void USB_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST #if CFG_TUD_ENABLED
tuh_int_handler(0); tuh_int_handler(0);
#endif #endif
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if CFG_TUH_ENABLED
tud_int_handler(0); tud_int_handler(0);
#endif #endif
} }
@@ -115,7 +115,7 @@ void board_init(void)
SysTick_Config(SystemCoreClock / 1000); SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS #elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif #endif
Chip_GPIO_Init(LPC_GPIO); Chip_GPIO_Init(LPC_GPIO);
+24 -12
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@@ -53,6 +53,18 @@
// {0x02, 7, 0, 7 }, // SW6 // {0x02, 7, 0, 7 }, // SW6
//}; //};
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
#define PORT_SUPPORT_DEVICE(_n) 0
#endif
#ifdef BOARD_TUH_RHPORT
#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
#else
#define PORT_SUPPORT_HOST(_n) 0
#endif
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
/* BOARD API /* BOARD API
*------------------------------------------------------------------*/ *------------------------------------------------------------------*/
@@ -116,7 +128,7 @@ void board_init(void)
SysTick_Config(SystemCoreClock / 1000); SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS #elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif #endif
Chip_GPIO_Init(LPC_GPIO_PORT); Chip_GPIO_Init(LPC_GPIO_PORT);
@@ -170,7 +182,7 @@ void board_init(void)
* - Insert jumpers in position 2-3 in JP17/JP18/JP19 * - Insert jumpers in position 2-3 in JP17/JP18/JP19
* - Insert jumpers in JP31 (OTG) * - Insert jumpers in JP31 (OTG)
*/ */
#if CFG_TUSB_RHPORT0_MODE #if PORT_SUPPORT_DEVICE(0) || PORT_SUPPORT_HOST(0)
Chip_USB0_Init(); Chip_USB0_Init();
#endif #endif
@@ -195,14 +207,14 @@ void board_init(void)
* - LED34 lights green when +5V is available on J20. * - LED34 lights green when +5V is available on J20.
* - JP15 shall not be inserted. JP16 has no effect * - JP15 shall not be inserted. JP16 has no effect
*/ */
#if CFG_TUSB_RHPORT1_MODE #if PORT_SUPPORT_DEVICE(1) || PORT_SUPPORT_HOST(1)
Chip_USB1_Init(); Chip_USB1_Init();
#endif #endif
// USB0 Vbus Power: P2_3 on EA4357 channel B U20 GPIO26 active low (base board) // USB0 Vbus Power: P2_3 on EA4357 channel B U20 GPIO26 active low (base board)
Chip_SCU_PinMuxSet(2, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC7); Chip_SCU_PinMuxSet(2, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC7);
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_DEVICE(0)
// P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low. // P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low.
Chip_SCU_PinMuxSet(9, 5, SCU_MODE_PULLDOWN | SCU_MODE_FUNC4); Chip_SCU_PinMuxSet(9, 5, SCU_MODE_PULLDOWN | SCU_MODE_FUNC4);
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 18); Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 18);
@@ -217,23 +229,23 @@ void board_init(void)
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void USB0_IRQHandler(void) void USB0_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST #if PORT_SUPPORT_DEVICE(0)
tuh_int_handler(0); tud_int_handler(0);
#endif #endif
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_HOST(0)
tud_int_handler(0); tuh_int_handler(0);
#endif #endif
} }
void USB1_IRQHandler(void) void USB1_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST #if PORT_SUPPORT_DEVICE(1)
tuh_int_handler(1); tud_int_handler(1);
#endif #endif
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_HOST(1)
tud_int_handler(1); tuh_int_handler(1);
#endif #endif
} }
+1 -1
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@@ -61,7 +61,7 @@ void isr(void)
irqs = irq_pending() & irq_getmask(); irqs = irq_pending() & irq_getmask();
#if CFG_TUSB_RHPORT0_MODE == OPT_MODE_DEVICE #if CFG_TUD_ENABLED
if (irqs & (1 << USB_INTERRUPT)) { if (irqs & (1 << USB_INTERRUPT)) {
tud_int_handler(0); tud_int_handler(0);
} }
+2 -2
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@@ -7,8 +7,8 @@ JLINK_DEVICE = MIMXRT1062xxx6A
# For flash-pyocd target # For flash-pyocd target
PYOCD_TARGET = mimxrt1060 PYOCD_TARGET = mimxrt1060
BOARD_DEVICE_RHPORT_NUM = 1 BOARD_TUD_RHPORT = 1
BOARD_HOST_RHPORT_NUM = 0 BOARD_TUH_RHPORT = 0
# flash using pyocd # flash using pyocd
flash: flash-pyocd flash: flash-pyocd
+2 -2
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@@ -7,8 +7,8 @@ JLINK_DEVICE = MIMXRT1064xxx6A
# For flash-pyocd target # For flash-pyocd target
PYOCD_TARGET = mimxrt1064 PYOCD_TARGET = mimxrt1064
BOARD_DEVICE_RHPORT_NUM = 1 BOARD_TUD_RHPORT = 1
BOARD_HOST_RHPORT_NUM = 0 BOARD_TUH_RHPORT = 0
# flash using pyocd # flash using pyocd
flash: flash-pyocd flash: flash-pyocd
+27 -11
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@@ -34,9 +34,25 @@
#include "clock_config.h" #include "clock_config.h"
#if defined(BOARD_TUD_RHPORT) && CFG_TUD_ENABLED
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
#define PORT_SUPPORT_DEVICE(_n) 0
#endif
#if defined(BOARD_TUH_RHPORT) && CFG_TUH_ENABLED
#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
#else
#define PORT_SUPPORT_HOST(_n) 0
#endif
// needed by fsl_flexspi_nor_boot // needed by fsl_flexspi_nor_boot
const uint8_t dcd_data[] = { 0x00 }; const uint8_t dcd_data[] = { 0x00 };
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
void board_init(void) void board_init(void)
{ {
// Init clock // Init clock
@@ -51,9 +67,9 @@ void board_init(void)
SysTick_Config(SystemCoreClock / 1000); SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS #elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_OTG1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); NVIC_SetPriority(USB_OTG1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#ifdef USB_OTG2_IRQn #ifdef USBPHY2
NVIC_SetPriority(USB_OTG2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); NVIC_SetPriority(USB_OTG2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif #endif
#endif #endif
@@ -149,23 +165,23 @@ void board_init(void)
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void USB_OTG1_IRQHandler(void) void USB_OTG1_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST #if PORT_SUPPORT_DEVICE(0)
tuh_int_handler(0); tud_int_handler(0);
#endif #endif
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_HOST(0)
tud_int_handler(0); tuh_int_handler(0);
#endif #endif
} }
void USB_OTG2_IRQHandler(void) void USB_OTG2_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST #if PORT_SUPPORT_DEVICE(1)
tuh_int_handler(1); tud_int_handler(1);
#endif #endif
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_HOST(1)
tud_int_handler(1); tuh_int_handler(1);
#endif #endif
} }
+4 -4
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@@ -15,11 +15,11 @@ CFLAGS += \
-DXIP_BOOT_HEADER_ENABLE=1 \ -DXIP_BOOT_HEADER_ENABLE=1 \
-DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX
ifdef BOARD_DEVICE_RHPORT_NUM ifdef BOARD_TUD_RHPORT
CFLAGS += -DBOARD_DEVICE_RHPORT_NUM=$(BOARD_DEVICE_RHPORT_NUM) CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT)
endif endif
ifdef BOARD_HOST_RHPORT_NUM ifdef BOARD_TUH_RHPORT
CFLAGS += -DBOARD_HOST_RHPORT_NUM=$(BOARD_HOST_RHPORT_NUM) CFLAGS += -DBOARD_TUH_RHPORT=$(BOARD_TUH_RHPORT)
endif endif
# mcu driver cause following warnings # mcu driver cause following warnings
+24 -11
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@@ -28,28 +28,40 @@
#include "bsp/board.h" #include "bsp/board.h"
#include "board.h" #include "board.h"
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
#define PORT_SUPPORT_DEVICE(_n) 0
#endif
#ifdef BOARD_TUH_RHPORT
#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
#else
#define PORT_SUPPORT_HOST(_n) 0
#endif
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// USB Interrupt Handler // USB Interrupt Handler
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void USB0_IRQHandler(void) void USB0_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST #if PORT_SUPPORT_DEVICE(0)
tuh_int_handler(0); tud_int_handler(0);
#endif #endif
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_HOST(0)
tud_int_handler(0); tuh_int_handler(0);
#endif #endif
} }
void USB1_IRQHandler(void) void USB1_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST #if PORT_SUPPORT_DEVICE(1)
tuh_int_handler(1); tud_int_handler(1);
#endif #endif
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_HOST(1)
tud_int_handler(1); tuh_int_handler(1);
#endif #endif
} }
@@ -84,7 +96,8 @@ void board_init(void)
SysTick_Config(SystemCoreClock / 1000); SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS #elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(USB1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif #endif
Chip_GPIO_Init(LPC_GPIO_PORT); Chip_GPIO_Init(LPC_GPIO_PORT);
@@ -102,11 +115,11 @@ void board_init(void)
Chip_UART_TXEnable(UART_DEV); Chip_UART_TXEnable(UART_DEV);
//------------- USB -------------// //------------- USB -------------//
#if CFG_TUSB_RHPORT0_MODE #if PORT_SUPPORT_DEVICE(0) || PORT_SUPPORT_HOST(0)
Chip_USB0_Init(); Chip_USB0_Init();
#endif #endif
#if CFG_TUSB_RHPORT1_MODE #if PORT_SUPPORT_DEVICE(1) || PORT_SUPPORT_HOST(1)
Chip_USB1_Init(); Chip_USB1_Init();
#endif #endif
} }
+14 -5
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@@ -33,6 +33,18 @@
#include "bsp/board.h" #include "bsp/board.h"
#include "board.h" #include "board.h"
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
#define PORT_SUPPORT_DEVICE(_n) 0
#endif
#ifdef BOARD_TUH_RHPORT
#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
#else
#define PORT_SUPPORT_HOST(_n) 0
#endif
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM // MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@@ -152,8 +164,7 @@ void board_init(void)
#if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT #if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT
// LPC546xx and LPC540xx has OTG 1 FS + 1 HS rhports // LPC546xx and LPC540xx has OTG 1 FS + 1 HS rhports
#if PORT_SUPPORT_DEVICE(0)
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
// Port0 is Full Speed // Port0 is Full Speed
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*< Turn on USB Phy */ POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*< Turn on USB Phy */
CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false); CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
@@ -167,7 +178,7 @@ void board_init(void)
CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbSrcFro, CLOCK_GetFroHfFreq()); CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbSrcFro, CLOCK_GetFroHfFreq());
#endif #endif
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_DEVICE(1)
// Port1 is High Speed // Port1 is High Speed
POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY);
@@ -178,10 +189,8 @@ void board_init(void)
CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUsbPll, 0U); CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUsbPll, 0U);
#endif #endif
#else #else
// LPC5411x series only has full speed device // LPC5411x series only has full speed device
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); // Turn on USB Phy POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); // Turn on USB Phy
CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */ CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */
#endif #endif
+1 -1
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@@ -15,7 +15,7 @@ CFLAGS += \
ifeq ($(PORT), 1) ifeq ($(PORT), 1)
$(info "PORT1 High Speed") $(info "PORT1 High Speed")
CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# LPC55 Highspeed Port1 can only write to USB_SRAM region # LPC55 Highspeed Port1 can only write to USB_SRAM region
CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))' CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))'
+14 -2
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@@ -34,6 +34,18 @@
#include "fsl_sctimer.h" #include "fsl_sctimer.h"
#include "sct_neopixel.h" #include "sct_neopixel.h"
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
#define PORT_SUPPORT_DEVICE(_n) 0
#endif
#ifdef BOARD_TUH_RHPORT
#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
#else
#define PORT_SUPPORT_HOST(_n) 0
#endif
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM // MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@@ -164,7 +176,7 @@ void board_init(void)
/* PORT0 PIN22 configured as USB0_VBUS */ /* PORT0 PIN22 configured as USB0_VBUS */
IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN); IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN);
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_DEVICE(0)
// Port0 is Full Speed // Port0 is Full Speed
/* Turn on USB0 Phy */ /* Turn on USB0 Phy */
@@ -189,7 +201,7 @@ void board_init(void)
CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
#endif #endif
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_DEVICE(1)
// Port1 is High Speed // Port1 is High Speed
/* Turn on USB1 Phy */ /* Turn on USB1 Phy */
+2 -2
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@@ -16,11 +16,11 @@ CFLAGS += \
-mfpu=fpv5-sp-d16 \ -mfpu=fpv5-sp-d16 \
-DCFG_TUSB_MCU=OPT_MCU_LPC55XX \ -DCFG_TUSB_MCU=OPT_MCU_LPC55XX \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \
-DBOARD_DEVICE_RHPORT_NUM=$(PORT) -DBOARD_TUD_RHPORT=$(PORT)
ifeq ($(PORT), 1) ifeq ($(PORT), 1)
$(info "PORT1 High Speed") $(info "PORT1 High Speed")
CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# LPC55 Highspeed Port1 can only write to USB_SRAM region # LPC55 Highspeed Port1 can only write to USB_SRAM region
CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))' CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))'
+4 -4
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@@ -32,12 +32,12 @@
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void USB_IRQHandler(void) void USB_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST #if CFG_TUD_ENABLED
tuh_int_handler(0); tud_int_handler(0);
#endif #endif
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if CFG_TUH_ENABLED
tud_int_handler(0); tuh_int_handler(0);
#endif #endif
} }
+4 -4
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@@ -146,12 +146,12 @@ void board_init(void)
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void USB_IRQHandler(void) void USB_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST #if CFG_TUD_ENABLED
tuh_int_handler(0); tud_int_handler(0);
#endif #endif
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if CFG_TUH_ENABLED
tud_int_handler(0); tuh_int_handler(0);
#endif #endif
} }
+21 -14
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@@ -40,6 +40,18 @@
#define BOARD_UART_PIN_TX 10 // PF.10 : UART0_TXD #define BOARD_UART_PIN_TX 10 // PF.10 : UART0_TXD
#define BOARD_UART_PIN_RX 11 // PF.11 : UART0_RXD #define BOARD_UART_PIN_RX 11 // PF.11 : UART0_RXD
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
#define PORT_SUPPORT_DEVICE(_n) 0
#endif
#ifdef BOARD_TUH_RHPORT
#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
#else
#define PORT_SUPPORT_HOST(_n) 0
#endif
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
/* BOARD API /* BOARD API
*------------------------------------------------------------------*/ *------------------------------------------------------------------*/
@@ -120,7 +132,7 @@ void board_init(void)
SysTick_Config(SystemCoreClock / 1000); SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS #elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif #endif
Chip_GPIO_Init(LPC_GPIO_PORT); Chip_GPIO_Init(LPC_GPIO_PORT);
@@ -167,9 +179,7 @@ void board_init(void)
* status feedback from the distribution switch. GPIO54 is used for VBUS sensing. 15Kohm pull-down * status feedback from the distribution switch. GPIO54 is used for VBUS sensing. 15Kohm pull-down
* resistors are always active * resistors are always active
*/ */
#if CFG_TUSB_RHPORT0_MODE
Chip_USB0_Init(); Chip_USB0_Init();
#endif
/* USB1 /* USB1
* When USB channel #1 is used as USB Host, 15Kohm pull-down resistors are needed on the USB data * When USB channel #1 is used as USB Host, 15Kohm pull-down resistors are needed on the USB data
@@ -189,12 +199,9 @@ void board_init(void)
* of VBUS can be read via U31. * of VBUS can be read via U31.
* JP16 shall not be inserted. * JP16 shall not be inserted.
*/ */
#if CFG_TUSB_RHPORT1_MODE
Chip_USB1_Init(); Chip_USB1_Init();
// Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 6); /* GPIO5[6] = USB1_PWR_EN */ // Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 6); /* GPIO5[6] = USB1_PWR_EN */
// Chip_GPIO_SetPinState(LPC_GPIO_PORT, 5, 6, true); /* GPIO5[6] output high */ // Chip_GPIO_SetPinState(LPC_GPIO_PORT, 5, 6, true); /* GPIO5[6] output high */
#endif
} }
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@@ -202,23 +209,23 @@ void board_init(void)
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void USB0_IRQHandler(void) void USB0_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST #if PORT_SUPPORT_DEVICE(0)
tuh_int_handler(0); tud_int_handler(0);
#endif #endif
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_HOST(0)
tud_int_handler(0); tuh_int_handler(0);
#endif #endif
} }
void USB1_IRQHandler(void) void USB1_IRQHandler(void)
{ {
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST #if PORT_SUPPORT_DEVICE(1)
tuh_int_handler(1); tud_int_handler(1);
#endif #endif
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE #if PORT_SUPPORT_HOST(1)
tud_int_handler(1); tuh_int_handler(1);
#endif #endif
} }
+1 -1
View File
@@ -99,7 +99,7 @@ void board_init(void)
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void UDP_Handler(void) void UDP_Handler(void)
{ {
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE #if CFG_TUD_ENABLED
tud_int_handler(0); tud_int_handler(0);
#endif #endif
} }
+2 -2
View File
@@ -125,7 +125,7 @@ void board_init(void)
UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
HAL_UART_Init(&UartHandle); HAL_UART_Init(&UartHandle);
#if BOARD_DEVICE_RHPORT_NUM == 0 #if BOARD_TUD_RHPORT == 0
// OTG_FS // OTG_FS
/* Configure DM DP Pins */ /* Configure DM DP Pins */
@@ -258,7 +258,7 @@ void board_init(void)
USB_OTG_HS->GUSBCFG &= ~USB_OTG_GUSBCFG_FHMOD; USB_OTG_HS->GUSBCFG &= ~USB_OTG_GUSBCFG_FHMOD;
USB_OTG_HS->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; USB_OTG_HS->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
#endif // BOARD_DEVICE_RHPORT_NUM #endif // BOARD_TUD_RHPORT
} }
+3 -3
View File
@@ -16,14 +16,14 @@ CFLAGS += \
-mfpu=fpv5-d16 \ -mfpu=fpv5-d16 \
-nostdlib -nostartfiles \ -nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_STM32F7 \ -DCFG_TUSB_MCU=OPT_MCU_STM32F7 \
-DBOARD_DEVICE_RHPORT_NUM=$(PORT) -DBOARD_TUD_RHPORT=$(PORT)
ifeq ($(PORT), 1) ifeq ($(PORT), 1)
ifeq ($(SPEED), high) ifeq ($(SPEED), high)
CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
$(info "Using OTG_HS in HighSpeed mode") $(info "Using OTG_HS in HighSpeed mode")
else else
CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_FULL_SPEED CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
$(info "Using OTG_HS in FullSpeed mode") $(info "Using OTG_HS in FullSpeed mode")
endif endif
else else
+2 -2
View File
@@ -122,7 +122,7 @@ void board_init(void)
UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
HAL_UART_Init(&UartHandle); HAL_UART_Init(&UartHandle);
#if BOARD_DEVICE_RHPORT_NUM == 0 #if BOARD_TUD_RHPORT == 0
// Despite being call USB2_OTG // Despite being call USB2_OTG
// OTG_FS is marked as RHPort0 by TinyUSB to be consistent across stm32 port // OTG_FS is marked as RHPort0 by TinyUSB to be consistent across stm32 port
// PA9 VUSB, PA10 ID, PA11 DM, PA12 DP // PA9 VUSB, PA10 ID, PA11 DM, PA12 DP
@@ -166,7 +166,7 @@ void board_init(void)
USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
#endif // vbus sense #endif // vbus sense
#elif BOARD_DEVICE_RHPORT_NUM == 1 #elif BOARD_TUD_RHPORT == 1
// Despite being call USB2_OTG // Despite being call USB2_OTG
// OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port // OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port
+3 -3
View File
@@ -16,14 +16,14 @@ CFLAGS += \
-mfpu=fpv5-d16 \ -mfpu=fpv5-d16 \
-nostdlib -nostartfiles \ -nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_STM32H7 \ -DCFG_TUSB_MCU=OPT_MCU_STM32H7 \
-DBOARD_DEVICE_RHPORT_NUM=$(PORT) -DBOARD_TUD_RHPORT=$(PORT)
ifeq ($(PORT), 1) ifeq ($(PORT), 1)
ifeq ($(SPEED), high) ifeq ($(SPEED), high)
CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
$(info "Using OTG_HS in HighSpeed mode") $(info "Using OTG_HS in HighSpeed mode")
else else
CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_FULL_SPEED CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
$(info "Using OTG_HS in FullSpeed mode") $(info "Using OTG_HS in FullSpeed mode")
endif endif
else else
+5 -3
View File
@@ -59,10 +59,12 @@ CFG_TUSB_MEM_SECTION btd_interface_t _btd_itf;
static bool bt_tx_data(uint8_t ep, void *data, uint16_t len) static bool bt_tx_data(uint8_t ep, void *data, uint16_t len)
{ {
// skip if previous transfer not complete uint8_t const rhport = 0;
TU_VERIFY(!usbd_edpt_busy(TUD_OPT_RHPORT, ep));
TU_ASSERT(usbd_edpt_xfer(TUD_OPT_RHPORT, ep, data, len)); // skip if previous transfer not complete
TU_VERIFY(!usbd_edpt_busy(rhport, ep));
TU_ASSERT(usbd_edpt_xfer(rhport, ep, data, len));
return true; return true;
} }
+2 -2
View File
@@ -82,7 +82,7 @@ CFG_TUSB_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
static bool _prep_out_transaction (cdcd_interface_t* p_cdc) static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
{ {
uint8_t const rhport = TUD_OPT_RHPORT; uint8_t const rhport = 0;
uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff); uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff);
// Prepare for incoming data but only allow what we can store in the ring buffer. // Prepare for incoming data but only allow what we can store in the ring buffer.
@@ -189,7 +189,7 @@ uint32_t tud_cdc_n_write_flush (uint8_t itf)
// No data to send // No data to send
if ( !tu_fifo_count(&p_cdc->tx_ff) ) return 0; if ( !tu_fifo_count(&p_cdc->tx_ff) ) return 0;
uint8_t const rhport = TUD_OPT_RHPORT; uint8_t const rhport = 0;
// Claim the endpoint // Claim the endpoint
TU_VERIFY( usbd_edpt_claim(rhport, p_cdc->ep_in), 0 ); TU_VERIFY( usbd_edpt_claim(rhport, p_cdc->ep_in), 0 );
+4 -3
View File
@@ -76,8 +76,9 @@ static inline uint8_t get_index_by_itfnum(uint8_t itf_num)
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
bool tud_hid_n_ready(uint8_t instance) bool tud_hid_n_ready(uint8_t instance)
{ {
uint8_t const rhport = 0;
uint8_t const ep_in = _hidd_itf[instance].ep_in; uint8_t const ep_in = _hidd_itf[instance].ep_in;
return tud_ready() && (ep_in != 0) && !usbd_edpt_busy(TUD_OPT_RHPORT, ep_in); return tud_ready() && (ep_in != 0) && !usbd_edpt_busy(rhport, ep_in);
} }
bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, uint8_t len) bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, uint8_t len)
@@ -103,7 +104,7 @@ bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, u
memcpy(p_hid->epin_buf, report, len); memcpy(p_hid->epin_buf, report, len);
} }
return usbd_edpt_xfer(TUD_OPT_RHPORT, p_hid->ep_in, p_hid->epin_buf, len); return usbd_edpt_xfer(rhport, p_hid->ep_in, p_hid->epin_buf, len);
} }
uint8_t tud_hid_n_interface_protocol(uint8_t instance) uint8_t tud_hid_n_interface_protocol(uint8_t instance)
@@ -172,7 +173,7 @@ bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id,
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void hidd_init(void) void hidd_init(void)
{ {
hidd_reset(TUD_OPT_RHPORT); hidd_reset(0);
} }
void hidd_reset(uint8_t rhport) void hidd_reset(uint8_t rhport)
+2 -2
View File
@@ -92,7 +92,7 @@ bool tud_midi_n_mounted (uint8_t itf)
static void _prep_out_transaction (midid_interface_t* p_midi) static void _prep_out_transaction (midid_interface_t* p_midi)
{ {
uint8_t const rhport = TUD_OPT_RHPORT; uint8_t const rhport = 0;
uint16_t available = tu_fifo_remaining(&p_midi->rx_ff); uint16_t available = tu_fifo_remaining(&p_midi->rx_ff);
// Prepare for incoming data but only allow what we can store in the ring buffer. // Prepare for incoming data but only allow what we can store in the ring buffer.
@@ -219,7 +219,7 @@ static uint32_t write_flush(midid_interface_t* midi)
// No data to send // No data to send
if ( !tu_fifo_count(&midi->tx_ff) ) return 0; if ( !tu_fifo_count(&midi->tx_ff) ) return 0;
uint8_t const rhport = TUD_OPT_RHPORT; uint8_t const rhport = 0;
// skip if previous transfer not complete // skip if previous transfer not complete
TU_VERIFY( usbd_edpt_claim(rhport, midi->ep_in), 0 ); TU_VERIFY( usbd_edpt_claim(rhport, midi->ep_in), 0 );
+6 -4
View File
@@ -108,20 +108,22 @@ static bool can_xmit;
void tud_network_recv_renew(void) void tud_network_recv_renew(void)
{ {
usbd_edpt_xfer(TUD_OPT_RHPORT, _netd_itf.ep_out, received, sizeof(received)); usbd_edpt_xfer(0, _netd_itf.ep_out, received, sizeof(received));
} }
static void do_in_xfer(uint8_t *buf, uint16_t len) static void do_in_xfer(uint8_t *buf, uint16_t len)
{ {
can_xmit = false; can_xmit = false;
usbd_edpt_xfer(TUD_OPT_RHPORT, _netd_itf.ep_in, buf, len); usbd_edpt_xfer(0, _netd_itf.ep_in, buf, len);
} }
void netd_report(uint8_t *buf, uint16_t len) void netd_report(uint8_t *buf, uint16_t len)
{ {
uint8_t const rhport = 0;
// skip if previous report not yet acknowledged by host // skip if previous report not yet acknowledged by host
if ( usbd_edpt_busy(TUD_OPT_RHPORT, _netd_itf.ep_notif) ) return; if ( usbd_edpt_busy(rhport, _netd_itf.ep_notif) ) return;
usbd_edpt_xfer(TUD_OPT_RHPORT, _netd_itf.ep_notif, buf, len); usbd_edpt_xfer(rhport, _netd_itf.ep_notif, buf, len);
} }
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
+5 -4
View File
@@ -188,7 +188,7 @@ static void ncm_start_tx(void) {
ntb->ndp.datagram[ncm_interface.datagram_count].wDatagramLength = 0; ntb->ndp.datagram[ncm_interface.datagram_count].wDatagramLength = 0;
// Kick off an endpoint transfer // Kick off an endpoint transfer
usbd_edpt_xfer(TUD_OPT_RHPORT, ncm_interface.ep_in, ntb->data, ntb_length); usbd_edpt_xfer(0, ncm_interface.ep_in, ntb->data, ntb_length);
ncm_interface.transferring = true; ncm_interface.transferring = true;
// Swap to the other NTB and clear it out // Swap to the other NTB and clear it out
@@ -229,7 +229,7 @@ void tud_network_recv_renew(void)
{ {
if (!ncm_interface.num_datagrams) if (!ncm_interface.num_datagrams)
{ {
usbd_edpt_xfer(TUD_OPT_RHPORT, ncm_interface.ep_out, receive_ntb, sizeof(receive_ntb)); usbd_edpt_xfer(0, ncm_interface.ep_out, receive_ntb, sizeof(receive_ntb));
return; return;
} }
@@ -316,14 +316,15 @@ uint16_t netd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint1
static void ncm_report(void) static void ncm_report(void)
{ {
uint8_t const rhport = 0;
if (ncm_interface.report_state == REPORT_SPEED) { if (ncm_interface.report_state == REPORT_SPEED) {
ncm_notify_speed_change.header.wIndex = ncm_interface.itf_num; ncm_notify_speed_change.header.wIndex = ncm_interface.itf_num;
usbd_edpt_xfer(TUD_OPT_RHPORT, ncm_interface.ep_notif, (uint8_t *) &ncm_notify_speed_change, sizeof(ncm_notify_speed_change)); usbd_edpt_xfer(rhport, ncm_interface.ep_notif, (uint8_t *) &ncm_notify_speed_change, sizeof(ncm_notify_speed_change));
ncm_interface.report_state = REPORT_CONNECTED; ncm_interface.report_state = REPORT_CONNECTED;
ncm_interface.report_pending = true; ncm_interface.report_pending = true;
} else if (ncm_interface.report_state == REPORT_CONNECTED) { } else if (ncm_interface.report_state == REPORT_CONNECTED) {
ncm_notify_connected.header.wIndex = ncm_interface.itf_num; ncm_notify_connected.header.wIndex = ncm_interface.itf_num;
usbd_edpt_xfer(TUD_OPT_RHPORT, ncm_interface.ep_notif, (uint8_t *) &ncm_notify_connected, sizeof(ncm_notify_connected)); usbd_edpt_xfer(rhport, ncm_interface.ep_notif, (uint8_t *) &ncm_notify_connected, sizeof(ncm_notify_connected));
ncm_interface.report_state = REPORT_DONE; ncm_interface.report_state = REPORT_DONE;
ncm_interface.report_pending = true; ncm_interface.report_pending = true;
} }
+8 -4
View File
@@ -84,14 +84,16 @@ bool tud_vendor_n_peek(uint8_t itf, uint8_t* u8)
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
static void _prep_out_transaction (vendord_interface_t* p_itf) static void _prep_out_transaction (vendord_interface_t* p_itf)
{ {
uint8_t const rhport = 0;
// skip if previous transfer not complete // skip if previous transfer not complete
if ( usbd_edpt_busy(TUD_OPT_RHPORT, p_itf->ep_out) ) return; if ( usbd_edpt_busy(rhport, p_itf->ep_out) ) return;
// Prepare for incoming data but only allow what we can store in the ring buffer. // Prepare for incoming data but only allow what we can store in the ring buffer.
uint16_t max_read = tu_fifo_remaining(&p_itf->rx_ff); uint16_t max_read = tu_fifo_remaining(&p_itf->rx_ff);
if ( max_read >= CFG_TUD_VENDOR_EPSIZE ) if ( max_read >= CFG_TUD_VENDOR_EPSIZE )
{ {
usbd_edpt_xfer(TUD_OPT_RHPORT, p_itf->ep_out, p_itf->epout_buf, CFG_TUD_VENDOR_EPSIZE); usbd_edpt_xfer(rhport, p_itf->ep_out, p_itf->epout_buf, CFG_TUD_VENDOR_EPSIZE);
} }
} }
@@ -115,13 +117,15 @@ void tud_vendor_n_read_flush (uint8_t itf)
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
static uint16_t maybe_transmit(vendord_interface_t* p_itf) static uint16_t maybe_transmit(vendord_interface_t* p_itf)
{ {
uint8_t const rhport = 0;
// skip if previous transfer not complete // skip if previous transfer not complete
TU_VERIFY( !usbd_edpt_busy(TUD_OPT_RHPORT, p_itf->ep_in) ); TU_VERIFY( !usbd_edpt_busy(rhport, p_itf->ep_in) );
uint16_t count = tu_fifo_read_n(&p_itf->tx_ff, p_itf->epin_buf, CFG_TUD_VENDOR_EPSIZE); uint16_t count = tu_fifo_read_n(&p_itf->tx_ff, p_itf->epin_buf, CFG_TUD_VENDOR_EPSIZE);
if (count > 0) if (count > 0)
{ {
TU_ASSERT( usbd_edpt_xfer(TUD_OPT_RHPORT, p_itf->ep_in, p_itf->epin_buf, count) ); TU_ASSERT( usbd_edpt_xfer(rhport, p_itf->ep_in, p_itf->epin_buf, count) );
} }
return count; return count;
} }
+13 -16
View File
@@ -45,8 +45,7 @@
* - ENDPOINT_MAX: max (logical) number of endpoint * - ENDPOINT_MAX: max (logical) number of endpoint
* - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
* e.g EP1 OUT & EP1 IN cannot exist together * e.g EP1 OUT & EP1 IN cannot exist together
* - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY) * - RHPORT_HIGHSPEED: support highspeed with on-chip PHY
* bit0 for port0 and so on.
*/ */
//------------- NXP -------------// //------------- NXP -------------//
@@ -63,8 +62,7 @@
#define TUP_USBIP_EHCI #define TUP_USBIP_EHCI
#define TUP_DCD_ENDPOINT_MAX 6 #define TUP_DCD_ENDPOINT_MAX 6
#define TUP_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 FS
#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
#define TUP_DCD_ENDPOINT_MAX 5 #define TUP_DCD_ENDPOINT_MAX 5
@@ -82,8 +80,7 @@
#define TUP_USBIP_EHCI #define TUP_USBIP_EHCI
#define TUP_DCD_ENDPOINT_MAX 8 #define TUP_DCD_ENDPOINT_MAX 8
#define TUP_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS
#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX)
#define TUP_DCD_ENDPOINT_MAX 16 #define TUP_DCD_ENDPOINT_MAX 16
@@ -107,7 +104,7 @@
#elif TU_CHECK_MCU(OPT_MCU_SAMX7X) #elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
#define TUP_DCD_ENDPOINT_MAX 10 #define TUP_DCD_ENDPOINT_MAX 10
#define TUP_RHPORT_HIGHSPEED 0x01 #define TUP_RHPORT_HIGHSPEED 1
#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
@@ -155,7 +152,7 @@
// MCU with on-chip HS Phy // MCU with on-chip HS Phy
#if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx) #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
#define TUP_RHPORT_HIGHSPEED 0x02 // Port 0: FS, Port 1: HS #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
#endif #endif
#elif TU_CHECK_MCU(OPT_MCU_STM32H7) #elif TU_CHECK_MCU(OPT_MCU_STM32H7)
@@ -185,12 +182,12 @@
#endif #endif
#elif TU_CHECK_MCU(OPT_MCU_STM32WB) #elif TU_CHECK_MCU(OPT_MCU_STM32WB)
#define TUP_DCD_ENDPOINT_MAX 8 #define TUP_DCD_ENDPOINT_MAX 8
//------------- Sony -------------// //------------- Sony -------------//
#elif TU_CHECK_MCU(OPT_MCU_CXD56) #elif TU_CHECK_MCU(OPT_MCU_CXD56)
#define TUP_DCD_ENDPOINT_MAX 7 #define TUP_DCD_ENDPOINT_MAX 7
#define TUP_RHPORT_HIGHSPEED 0x01 #define TUP_RHPORT_HIGHSPEED 1
#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
//------------- TI -------------// //------------- TI -------------//
@@ -213,7 +210,7 @@
#elif TU_CHECK_MCU(OPT_MCU_NUC505) #elif TU_CHECK_MCU(OPT_MCU_NUC505)
#define TUP_DCD_ENDPOINT_MAX 12 #define TUP_DCD_ENDPOINT_MAX 12
#define TUP_RHPORT_HIGHSPEED 0x01 #define TUP_RHPORT_HIGHSPEED 1
//------------- Espressif -------------// //------------- Espressif -------------//
#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
@@ -228,7 +225,7 @@
#elif TU_CHECK_MCU(OPT_MCU_RP2040) #elif TU_CHECK_MCU(OPT_MCU_RP2040)
#define TUP_DCD_ENDPOINT_MAX 16 #define TUP_DCD_ENDPOINT_MAX 16
#define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb"))) #define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb")))
//------------- Silabs -------------// //------------- Silabs -------------//
#elif TU_CHECK_MCU(OPT_MCU_EFM32GG) #elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
@@ -248,7 +245,7 @@
#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
#define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2
#define TUP_DCD_ENDPOINT_MAX 8 #define TUP_DCD_ENDPOINT_MAX 8
#define TUP_RHPORT_HIGHSPEED 0x01 #define TUP_RHPORT_HIGHSPEED 1
//------------- Broadcom -------------// //------------- Broadcom -------------//
#elif TU_CHECK_MCU(OPT_MCU_XMC4000) #elif TU_CHECK_MCU(OPT_MCU_XMC4000)
@@ -258,11 +255,11 @@
//------------- BridgeTek -------------// //------------- BridgeTek -------------//
#elif TU_CHECK_MCU(OPT_MCU_FT90X) #elif TU_CHECK_MCU(OPT_MCU_FT90X)
#define TUP_DCD_ENDPOINT_MAX 8 #define TUP_DCD_ENDPOINT_MAX 8
#define TUP_RHPORT_HIGHSPEED 0x01 #define TUP_RHPORT_HIGHSPEED 1
#elif TU_CHECK_MCU(OPT_MCU_FT93X) #elif TU_CHECK_MCU(OPT_MCU_FT93X)
#define TUP_DCD_ENDPOINT_MAX 16 #define TUP_DCD_ENDPOINT_MAX 16
#define TUP_RHPORT_HIGHSPEED 0x01 #define TUP_RHPORT_HIGHSPEED 1
//------------ Allwinner -------------// //------------ Allwinner -------------//
#elif TU_CHECK_MCU(OPT_MCU_F1C100S) #elif TU_CHECK_MCU(OPT_MCU_F1C100S)
@@ -281,7 +278,7 @@
// Default to fullspeed if not defined // Default to fullspeed if not defined
#ifndef TUP_RHPORT_HIGHSPEED #ifndef TUP_RHPORT_HIGHSPEED
#define TUP_RHPORT_HIGHSPEED 0x00 #define TUP_RHPORT_HIGHSPEED 0
#endif #endif
// fast function, normally mean placing function in SRAM // fast function, normally mean placing function in SRAM
+13 -1
View File
@@ -428,7 +428,6 @@ bool tud_init (uint8_t rhport)
dcd_init(rhport); dcd_init(rhport);
dcd_int_enable(rhport); dcd_int_enable(rhport);
return true; return true;
} }
@@ -1199,6 +1198,8 @@ void usbd_defer_func(osal_task_func_t func, void* param, bool in_isr)
bool usbd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) bool usbd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep)
{ {
rhport = _usbd_rhport;
TU_ASSERT(tu_edpt_number(desc_ep->bEndpointAddress) < CFG_TUD_ENDPPOINT_MAX); TU_ASSERT(tu_edpt_number(desc_ep->bEndpointAddress) < CFG_TUD_ENDPPOINT_MAX);
TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed)); TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed));
@@ -1240,6 +1241,8 @@ bool usbd_edpt_release(uint8_t rhport, uint8_t ep_addr)
bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
{ {
rhport = _usbd_rhport;
uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr);
@@ -1275,6 +1278,8 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
// into the USB buffer! // into the USB buffer!
bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
{ {
rhport = _usbd_rhport;
uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr);
@@ -1314,6 +1319,7 @@ bool usbd_edpt_busy(uint8_t rhport, uint8_t ep_addr)
void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr) void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
{ {
rhport = _usbd_rhport;
uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr);
@@ -1330,6 +1336,8 @@ void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
{ {
rhport = _usbd_rhport;
uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr);
@@ -1361,6 +1369,8 @@ bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr)
*/ */
void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr) void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr)
{ {
rhport = _usbd_rhport;
TU_ASSERT(dcd_edpt_close, /**/); TU_ASSERT(dcd_edpt_close, /**/);
TU_LOG2(" CLOSING Endpoint: 0x%02X\r\n", ep_addr); TU_LOG2(" CLOSING Endpoint: 0x%02X\r\n", ep_addr);
@@ -1377,6 +1387,8 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr)
void usbd_sof_enable(uint8_t rhport, bool en) void usbd_sof_enable(uint8_t rhport, bool en)
{ {
rhport = _usbd_rhport;
// TODO: Check needed if all drivers including the user sof_cb does not need an active SOF ISR any more. // TODO: Check needed if all drivers including the user sof_cb does not need an active SOF ISR any more.
// Only if all drivers switched off SOF calls the SOF interrupt may be disabled // Only if all drivers switched off SOF calls the SOF interrupt may be disabled
dcd_sof_enable(rhport, en); dcd_sof_enable(rhport, en);
+1
View File
@@ -62,6 +62,7 @@ void usbd_int_set(bool enabled);
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// USBD Endpoint API // USBD Endpoint API
// Note: rhport should be 0 since device stack only support 1 rhport for now
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// Open an endpoint // Open an endpoint
+22 -22
View File
@@ -239,12 +239,12 @@ static void _dcd_ft90x_attach(void)
CRITICAL_SECTION_BEGIN CRITICAL_SECTION_BEGIN
// Turn off the device enable bit. // Turn off the device enable bit.
#if BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_HIGH_SPEED #if BOARD_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED
USBD_REG(fctrl) = 0; USBD_REG(fctrl) = 0;
#else // BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_FULL_SPEED #else // BOARD_TUD_MAX_SPEED == OPT_MODE_FULL_SPEED
//Set the full speed only bit if required. //Set the full speed only bit if required.
USBD_REG(fctrl) = MASK_USBD_FCTRL_MODE_FS_ONLY; USBD_REG(fctrl) = MASK_USBD_FCTRL_MODE_FS_ONLY;
#endif // BOARD_DEVICE_RHPORT_SPEED #endif // BOARD_TUD_MAX_SPEED
// Clear first reset and suspend interrupts. // Clear first reset and suspend interrupts.
do do
@@ -291,7 +291,7 @@ static void _dcd_ft90x_detach(void)
delayms(1); delayms(1);
// Disable USB PHY // Disable USB PHY
dcd_disconnect(BOARD_DEVICE_RHPORT_NUM); dcd_disconnect(BOARD_TUD_RHPORT);
delayms(1); delayms(1);
// Disable Chip USB device clock/PM configuration. // Disable Chip USB device clock/PM configuration.
@@ -312,7 +312,7 @@ static void _dcd_ft90x_detach(void)
// Determine the speed of the USB to which we are connected. // Determine the speed of the USB to which we are connected.
// Set the speed of the PHY accordingly. // Set the speed of the PHY accordingly.
// High speed can be disabled through CFG_TUSB_RHPORT0_MODE settings. // High speed can be disabled through CFG_TUSB_RHPORT0_MODE or CFG_TUD_MAX_SPEED settings.
static void _ft90x_usb_speed(void) static void _ft90x_usb_speed(void)
{ {
uint8_t fctrl_val; uint8_t fctrl_val;
@@ -323,7 +323,7 @@ static void _ft90x_usb_speed(void)
delayus(200); delayus(200);
} }
#if BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_HIGH_SPEED #if BOARD_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED
/* Detect high or full speed */ /* Detect high or full speed */
fctrl_val = MASK_USBD_FCTRL_USB_DEV_EN; fctrl_val = MASK_USBD_FCTRL_USB_DEV_EN;
@@ -347,11 +347,11 @@ static void _ft90x_usb_speed(void)
delayus(125 + 5); delayus(125 + 5);
_speed = (USBD_REG(cmif) & MASK_USBD_CMIF_SOFIRQ) ? _speed = (USBD_REG(cmif) & MASK_USBD_CMIF_SOFIRQ) ?
TUSB_SPEED_HIGH : TUSB_SPEED_FULL; TUSB_SPEED_HIGH : TUSB_SPEED_FULL;
dcd_event_bus_reset(BOARD_DEVICE_RHPORT_NUM, _speed, true); dcd_event_bus_reset(BOARD_TUD_RHPORT, _speed, true);
#endif /* !__FT930__ */ #endif /* !__FT930__ */
#else // BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_FULL_SPEED #else // BOARD_TUD_MAX_SPEED == OPT_MODE_FULL_SPEED
/* User force set to full speed */ /* User force set to full speed */
_speed = TUSB_SPEED_FULL; _speed = TUSB_SPEED_FULL;
@@ -364,10 +364,10 @@ static void _ft90x_usb_speed(void)
} }
#endif #endif
USBD_REG(fctrl) = fctrl_val; USBD_REG(fctrl) = fctrl_val;
dcd_event_bus_reset(BOARD_DEVICE_RHPORT_NUM, _speed, true); dcd_event_bus_reset(BOARD_TUD_RHPORT, _speed, true);
return; return;
#endif // BOARD_DEVICE_RHPORT_SPEED #endif // BOARD_TUD_MAX_SPEED
} }
// Send a buffer to the USB IN FIFO. // Send a buffer to the USB IN FIFO.
@@ -899,7 +899,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
void _ft90x_usbd_ISR(void) void _ft90x_usbd_ISR(void)
{ {
tud_int_handler(BOARD_DEVICE_RHPORT_NUM); // Resolves to dcd_int_handler(). tud_int_handler(BOARD_TUD_RHPORT); // Resolves to dcd_int_handler().
} }
void dcd_int_handler(uint8_t rhport) void dcd_int_handler(uint8_t rhport)
@@ -937,19 +937,19 @@ void dcd_int_handler(uint8_t rhport)
{ {
// Reset endpoints to default state. // Reset endpoints to default state.
_ft90x_reset_edpts(); _ft90x_reset_edpts();
dcd_event_bus_reset(BOARD_DEVICE_RHPORT_NUM, _speed, true); dcd_event_bus_reset(BOARD_TUD_RHPORT, _speed, true);
} }
if (cmif & MASK_USBD_CMIF_SUSIRQ) //Handle Suspend interrupt if (cmif & MASK_USBD_CMIF_SUSIRQ) //Handle Suspend interrupt
{ {
dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_SUSPEND, true); dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_SUSPEND, true);
} }
if (cmif & MASK_USBD_CMIF_RESIRQ) //Handle Resume interrupt if (cmif & MASK_USBD_CMIF_RESIRQ) //Handle Resume interrupt
{ {
dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_RESUME, true); dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_RESUME, true);
} }
if (cmif & MASK_USBD_CMIF_SOFIRQ) //Handle SOF interrupt if (cmif & MASK_USBD_CMIF_SOFIRQ) //Handle SOF interrupt
{ {
dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_SOF, true); dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_SOF, true);
} }
} }
// Handle endpoint interrupts. // Handle endpoint interrupts.
@@ -980,7 +980,7 @@ void dcd_int_handler(uint8_t rhport)
_ft90x_dusb_out(USBD_EP_0, (uint8_t *)_ft90x_setup_packet, sizeof(USB_device_request)); _ft90x_dusb_out(USBD_EP_0, (uint8_t *)_ft90x_setup_packet, sizeof(USB_device_request));
// Send the packet to tinyusb. // Send the packet to tinyusb.
dcd_event_setup_received(BOARD_DEVICE_RHPORT_NUM, _ft90x_setup_packet, true); dcd_event_setup_received(BOARD_TUD_RHPORT, _ft90x_setup_packet, true);
// Clear the interrupt that signals a SETUP packet is received. // Clear the interrupt that signals a SETUP packet is received.
USBD_EP_SR_REG(USBD_EP_0) = (MASK_USBD_EP0SR_SETUP); USBD_EP_SR_REG(USBD_EP_0) = (MASK_USBD_EP0SR_SETUP);
@@ -1002,7 +1002,7 @@ void dcd_int_handler(uint8_t rhport)
xfer_bytes = _ft90x_edpt_xfer_out(USBD_EP_0, (uint8_t *)ep_xfer[USBD_EP_0].buff_ptr, xfer_bytes); xfer_bytes = _ft90x_edpt_xfer_out(USBD_EP_0, (uint8_t *)ep_xfer[USBD_EP_0].buff_ptr, xfer_bytes);
} }
// Now signal completion of data packet. // Now signal completion of data packet.
dcd_event_xfer_complete(BOARD_DEVICE_RHPORT_NUM, (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), xfer_bytes, XFER_RESULT_SUCCESS, true); dcd_event_xfer_complete(BOARD_TUD_RHPORT, (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), xfer_bytes, XFER_RESULT_SUCCESS, true);
// Allow new transfers on the control endpoint. // Allow new transfers on the control endpoint.
ep_xfer[USBD_EP_0].valid = 0; ep_xfer[USBD_EP_0].valid = 0;
@@ -1059,7 +1059,7 @@ void dcd_int_handler(uint8_t rhport)
if (ep_xfer[ep_number].remain_size == 0) if (ep_xfer[ep_number].remain_size == 0)
{ {
// Signal tinyUSB. // Signal tinyUSB.
dcd_event_xfer_complete(BOARD_DEVICE_RHPORT_NUM, ep_number | ep_dirmask, ep_xfer[ep_number].total_size, XFER_RESULT_SUCCESS, true); dcd_event_xfer_complete(BOARD_TUD_RHPORT, ep_number | ep_dirmask, ep_xfer[ep_number].total_size, XFER_RESULT_SUCCESS, true);
// Allow new transfers on this endpoint. // Allow new transfers on this endpoint.
ep_xfer[ep_number].valid = 0; ep_xfer[ep_number].valid = 0;
@@ -1084,21 +1084,21 @@ void ft90x_usbd_pm_ISR(void)
{ {
// Signal connection interrupt // Signal connection interrupt
SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND; SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND;
dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_RESUME, true); dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_RESUME, true);
} }
if (pmcfg & MASK_SYS_PMCFG_DEV_DIS_DEV) if (pmcfg & MASK_SYS_PMCFG_DEV_DIS_DEV)
{ {
// Signal disconnection interrupt // Signal disconnection interrupt
SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND; SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND;
dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_UNPLUGGED, true); dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_UNPLUGGED, true);
} }
if (pmcfg & MASK_SYS_PMCFG_HOST_RST_DEV) if (pmcfg & MASK_SYS_PMCFG_HOST_RST_DEV)
{ {
// Signal Host Reset interrupt // Signal Host Reset interrupt
SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND; SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND;
dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_BUS_RESET, true); dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_BUS_RESET, true);
} }
if (pmcfg & MASK_SYS_PMCFG_HOST_RESUME_DEV) if (pmcfg & MASK_SYS_PMCFG_HOST_RESUME_DEV)
@@ -1109,7 +1109,7 @@ void ft90x_usbd_pm_ISR(void)
{ {
// If we are driving K-state on Device USB port; // If we are driving K-state on Device USB port;
// We must maintain the 1ms requirement before resuming the phy // We must maintain the 1ms requirement before resuming the phy
dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_RESUME, true); dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_RESUME, true);
} }
} }
} }
+50 -36
View File
@@ -34,6 +34,13 @@
#include "device/dcd.h" #include "device/dcd.h"
#include "dwc2_type.h" #include "dwc2_type.h"
// Following symbols must be defined by port header
// - _dwc2_controller[]: array of controllers
// - DWC2_EP_MAX: largest EP counts of all controllers
// - dwc2_phy_init/dwc2_phy_update: phy init called before and after core reset
// - dwc2_dcd_int_enable/dwc2_dcd_int_disable
// - dwc2_remote_wakeup_delay
#if defined(TUP_USBIP_DWC2_STM32) #if defined(TUP_USBIP_DWC2_STM32)
#include "dwc2_stm32.h" #include "dwc2_stm32.h"
#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
@@ -55,7 +62,7 @@
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// DWC2 registers // DWC2 registers
#define DWC2_REG(_port) ((dwc2_regs_t*) DWC2_REG_BASE) #define DWC2_REG(_port) ((dwc2_regs_t*) _dwc2_controller[_port].reg_base)
// Debug level for DWC2 // Debug level for DWC2
#define DWC2_DEBUG 2 #define DWC2_DEBUG 2
@@ -72,7 +79,6 @@
#define dcache_clean_invalidate(_addr, _size) #define dcache_clean_invalidate(_addr, _size)
#endif #endif
static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[2]; static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[2];
typedef struct { typedef struct {
@@ -97,34 +103,32 @@ static bool _out_ep_closed; // Flag to check if RX FIFO si
static bool _sof_en; static bool _sof_en;
// Calculate the RX FIFO size according to recommendations from reference manual // Calculate the RX FIFO size according to recommendations from reference manual
static inline uint16_t calc_rx_ff_size(uint16_t ep_size) static inline uint16_t calc_grxfsiz(uint16_t max_ep_size, uint8_t ep_count)
{ {
return 15 + 2*(ep_size/4) + 2*DWC2_EP_MAX; return 15 + 2*(max_ep_size/4) + 2*ep_count;
} }
static void update_grxfsiz(uint8_t rhport) static void update_grxfsiz(uint8_t rhport)
{ {
(void) rhport; dwc2_regs_t * dwc2 = DWC2_REG(rhport);
uint8_t const ep_count = _dwc2_controller[rhport].ep_count;
dwc2_regs_t * dwc2 = DWC2_REG(rhport);
// Determine largest EP size for RX FIFO // Determine largest EP size for RX FIFO
uint16_t max_epsize = 0; uint16_t max_epsize = 0;
for (uint8_t epnum = 0; epnum < DWC2_EP_MAX; epnum++) for (uint8_t epnum = 0; epnum < ep_count; epnum++)
{ {
max_epsize = tu_max16(max_epsize, xfer_status[epnum][TUSB_DIR_OUT].max_size); max_epsize = tu_max16(max_epsize, xfer_status[epnum][TUSB_DIR_OUT].max_size);
} }
// Update size of RX FIFO // Update size of RX FIFO
dwc2->grxfsiz = calc_rx_ff_size(max_epsize); dwc2->grxfsiz = calc_grxfsiz(max_epsize, ep_count);
} }
// Setup the control endpoint 0. // Start of Bus Reset
static void bus_reset(uint8_t rhport) static void bus_reset(uint8_t rhport)
{ {
(void) rhport; dwc2_regs_t * dwc2 = DWC2_REG(rhport);
uint8_t const ep_count = _dwc2_controller[rhport].ep_count;
dwc2_regs_t * dwc2 = DWC2_REG(rhport);
tu_memclr(xfer_status, sizeof(xfer_status)); tu_memclr(xfer_status, sizeof(xfer_status));
_out_ep_closed = false; _out_ep_closed = false;
@@ -135,7 +139,7 @@ static void bus_reset(uint8_t rhport)
dwc2->dcfg &= ~DCFG_DAD_Msk; dwc2->dcfg &= ~DCFG_DAD_Msk;
// 1. NAK for all OUT endpoints // 1. NAK for all OUT endpoints
for ( uint8_t n = 0; n < DWC2_EP_MAX; n++ ) for ( uint8_t n = 0; n < ep_count; n++ )
{ {
dwc2->epout[n].doepctl |= DOEPCTL_SNAK; dwc2->epout[n].doepctl |= DOEPCTL_SNAK;
} }
@@ -185,22 +189,24 @@ static void bus_reset(uint8_t rhport)
// - 2 for each used OUT endpoint // - 2 for each used OUT endpoint
// //
// Therefore GRXFSIZ = 13 + 1 + 1 + 2 x (Largest-EPsize/4) + 2 x EPOUTnum // Therefore GRXFSIZ = 13 + 1 + 1 + 2 x (Largest-EPsize/4) + 2 x EPOUTnum
// - FullSpeed (64 Bytes ): GRXFSIZ = 15 + 2 x 16 + 2 x DWC2_EP_MAX = 47 + 2 x DWC2_EP_MAX // - FullSpeed (64 Bytes ): GRXFSIZ = 15 + 2 x 16 + 2 x ep_count = 47 + 2 x ep_count
// - Highspeed (512 bytes): GRXFSIZ = 15 + 2 x 128 + 2 x DWC2_EP_MAX = 271 + 2 x DWC2_EP_MAX // - Highspeed (512 bytes): GRXFSIZ = 15 + 2 x 128 + 2 x ep_count = 271 + 2 x ep_count
// //
// NOTE: Largest-EPsize & EPOUTnum is actual used endpoints in configuration. Since DCD has no knowledge // NOTE: Largest-EPsize & EPOUTnum is actual used endpoints in configuration. Since DCD has no knowledge
// of the overall picture yet. We will use the worst scenario: largest possible + DWC2_EP_MAX // of the overall picture yet. We will use the worst scenario: largest possible + ep_count
// //
// For Isochronous, largest EP size can be 1023/1024 for FS/HS respectively. In addition if multiple ISO // For Isochronous, largest EP size can be 1023/1024 for FS/HS respectively. In addition if multiple ISO
// are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended. Maybe provide a macro for application to // are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended. Maybe provide a macro for application to
// overwrite this. // overwrite this.
dwc2->grxfsiz = calc_rx_ff_size(TUD_OPT_HIGH_SPEED ? 512 : 64); // EP0 out max is 64
dwc2->grxfsiz = calc_grxfsiz(64, ep_count);
// Setup the control endpoint 0
_allocated_fifo_words_tx = 16; _allocated_fifo_words_tx = 16;
// Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word ) // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word )
dwc2->dieptxf0 = (16 << DIEPTXF0_TX0FD_Pos) | (DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); dwc2->dieptxf0 = (16 << DIEPTXF0_TX0FD_Pos) | (_dwc2_controller[rhport].ep_fifo_size/4 - _allocated_fifo_words_tx);
// Fixed control EP0 size to 64 bytes // Fixed control EP0 size to 64 bytes
dwc2->epin[0].diepctl &= ~(0x03 << DIEPCTL_MPSIZ_Pos); dwc2->epin[0].diepctl &= ~(0x03 << DIEPCTL_MPSIZ_Pos);
@@ -363,7 +369,11 @@ static void reset_core(dwc2_regs_t * dwc2)
static bool phy_hs_supported(dwc2_regs_t * dwc2) static bool phy_hs_supported(dwc2_regs_t * dwc2)
{ {
// note: esp32 incorrect report its hs_phy_type as utmi // note: esp32 incorrect report its hs_phy_type as utmi
#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
return false;
#else
return TUD_OPT_HIGH_SPEED && dwc2->ghwcfg2_bm.hs_phy_type != HS_PHY_TYPE_NONE; return TUD_OPT_HIGH_SPEED && dwc2->ghwcfg2_bm.hs_phy_type != HS_PHY_TYPE_NONE;
#endif
} }
static void phy_fs_init(dwc2_regs_t * dwc2) static void phy_fs_init(dwc2_regs_t * dwc2)
@@ -462,6 +472,7 @@ static bool check_dwc2(dwc2_regs_t * dwc2)
#endif #endif
// For some reasons: GD32VF103 snpsid and all hwcfg register are always zero (skip it) // For some reasons: GD32VF103 snpsid and all hwcfg register are always zero (skip it)
(void) dwc2;
#if !TU_CHECK_MCU(OPT_MCU_GD32VF103) #if !TU_CHECK_MCU(OPT_MCU_GD32VF103)
uint32_t const gsnpsid = dwc2->gsnpsid & GSNPSID_ID_MASK; uint32_t const gsnpsid = dwc2->gsnpsid & GSNPSID_ID_MASK;
TU_ASSERT(gsnpsid == DWC2_OTG_ID || gsnpsid == DWC2_FS_IOT_ID || gsnpsid == DWC2_HS_IOT_ID); TU_ASSERT(gsnpsid == DWC2_OTG_ID || gsnpsid == DWC2_FS_IOT_ID || gsnpsid == DWC2_HS_IOT_ID);
@@ -620,12 +631,13 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
{ {
(void) rhport; (void) rhport;
dwc2_regs_t * dwc2 = DWC2_REG(rhport); dwc2_regs_t * dwc2 = DWC2_REG(rhport);
uint8_t const ep_count = _dwc2_controller[rhport].ep_count;
uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress);
TU_ASSERT(epnum < DWC2_EP_MAX); TU_ASSERT(epnum < ep_count);
xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir);
xfer->max_size = tu_edpt_packet_size(desc_edpt); xfer->max_size = tu_edpt_packet_size(desc_edpt);
@@ -636,12 +648,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
if(dir == TUSB_DIR_OUT) if(dir == TUSB_DIR_OUT)
{ {
// Calculate required size of RX FIFO // Calculate required size of RX FIFO
uint16_t const sz = calc_rx_ff_size(4*fifo_size); uint16_t const sz = calc_grxfsiz(4*fifo_size, ep_count);
// If size_rx needs to be extended check if possible and if so enlarge it // If size_rx needs to be extended check if possible and if so enlarge it
if (dwc2->grxfsiz < sz) if (dwc2->grxfsiz < sz)
{ {
TU_ASSERT(sz + _allocated_fifo_words_tx <= DWC2_EP_FIFO_SIZE/4); TU_ASSERT(sz + _allocated_fifo_words_tx <= _dwc2_controller[rhport].ep_fifo_size/4);
// Enlarge RX FIFO // Enlarge RX FIFO
dwc2->grxfsiz = sz; dwc2->grxfsiz = sz;
@@ -678,15 +690,15 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
// - IN EP 1 gets FIFO 1, IN EP "n" gets FIFO "n". // - IN EP 1 gets FIFO 1, IN EP "n" gets FIFO "n".
// Check if free space is available // Check if free space is available
TU_ASSERT(_allocated_fifo_words_tx + fifo_size + dwc2->grxfsiz <= DWC2_EP_FIFO_SIZE/4); TU_ASSERT(_allocated_fifo_words_tx + fifo_size + dwc2->grxfsiz <= _dwc2_controller[rhport].ep_fifo_size/4);
_allocated_fifo_words_tx += fifo_size; _allocated_fifo_words_tx += fifo_size;
TU_LOG(DWC2_DEBUG, " Allocated %u bytes at offset %u", fifo_size*4, DWC2_EP_FIFO_SIZE-_allocated_fifo_words_tx*4); TU_LOG(DWC2_DEBUG, " Allocated %u bytes at offset %lu", fifo_size*4, _dwc2_controller[rhport].ep_fifo_size-_allocated_fifo_words_tx*4);
// DIEPTXF starts at FIFO #1. // DIEPTXF starts at FIFO #1.
// Both TXFD and TXSA are in unit of 32-bit words. // Both TXFD and TXSA are in unit of 32-bit words.
dwc2->dieptxf[epnum - 1] = (fifo_size << DIEPTXF_INEPTXFD_Pos) | (DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); dwc2->dieptxf[epnum - 1] = (fifo_size << DIEPTXF_INEPTXFD_Pos) | (_dwc2_controller[rhport].ep_fifo_size/4 - _allocated_fifo_words_tx);
dwc2->epin[epnum].diepctl |= (1 << DIEPCTL_USBAEP_Pos) | dwc2->epin[epnum].diepctl |= (1 << DIEPCTL_USBAEP_Pos) |
(epnum << DIEPCTL_TXFNUM_Pos) | (epnum << DIEPCTL_TXFNUM_Pos) |
@@ -703,14 +715,13 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
// Close all non-control endpoints, cancel all pending transfers if any. // Close all non-control endpoints, cancel all pending transfers if any.
void dcd_edpt_close_all (uint8_t rhport) void dcd_edpt_close_all (uint8_t rhport)
{ {
(void) rhport; dwc2_regs_t * dwc2 = DWC2_REG(rhport);
uint8_t const ep_count = _dwc2_controller[rhport].ep_count;
dwc2_regs_t * dwc2 = DWC2_REG(rhport);
// Disable non-control interrupt // Disable non-control interrupt
dwc2->daintmsk = (1 << DAINTMSK_OEPM_Pos) | (1 << DAINTMSK_IEPM_Pos); dwc2->daintmsk = (1 << DAINTMSK_OEPM_Pos) | (1 << DAINTMSK_IEPM_Pos);
for(uint8_t n = 1; n < DWC2_EP_MAX; n++) for(uint8_t n = 1; n < ep_count; n++)
{ {
// disable OUT endpoint // disable OUT endpoint
dwc2->epout[n].doepctl = 0; dwc2->epout[n].doepctl = 0;
@@ -871,8 +882,9 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
{ {
uint16_t const fifo_size = (dwc2->dieptxf[epnum - 1] & DIEPTXF_INEPTXFD_Msk) >> DIEPTXF_INEPTXFD_Pos; uint16_t const fifo_size = (dwc2->dieptxf[epnum - 1] & DIEPTXF_INEPTXFD_Msk) >> DIEPTXF_INEPTXFD_Pos;
uint16_t const fifo_start = (dwc2->dieptxf[epnum - 1] & DIEPTXF_INEPTXSA_Msk) >> DIEPTXF_INEPTXSA_Pos; uint16_t const fifo_start = (dwc2->dieptxf[epnum - 1] & DIEPTXF_INEPTXSA_Msk) >> DIEPTXF_INEPTXSA_Pos;
// For now only the last opened endpoint can be closed without fuss. // For now only the last opened endpoint can be closed without fuss.
TU_ASSERT(fifo_start == DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx,); TU_ASSERT(fifo_start == _dwc2_controller[rhport].ep_fifo_size/4 - _allocated_fifo_words_tx,);
_allocated_fifo_words_tx -= fifo_size; _allocated_fifo_words_tx -= fifo_size;
} }
else else
@@ -1075,11 +1087,12 @@ static void handle_rxflvl_irq(uint8_t rhport)
static void handle_epout_irq (uint8_t rhport) static void handle_epout_irq (uint8_t rhport)
{ {
dwc2_regs_t *dwc2 = DWC2_REG(rhport); dwc2_regs_t * dwc2 = DWC2_REG(rhport);
uint8_t const ep_count = _dwc2_controller[rhport].ep_count;
// DAINT for a given EP clears when DOEPINTx is cleared. // DAINT for a given EP clears when DOEPINTx is cleared.
// OEPINT will be cleared when DAINT's out bits are cleared. // OEPINT will be cleared when DAINT's out bits are cleared.
for ( uint8_t n = 0; n < DWC2_EP_MAX; n++ ) for ( uint8_t n = 0; n < ep_count; n++ )
{ {
if ( dwc2->daint & TU_BIT(DAINT_OEPINT_Pos + n) ) if ( dwc2->daint & TU_BIT(DAINT_OEPINT_Pos + n) )
{ {
@@ -1126,12 +1139,13 @@ static void handle_epout_irq (uint8_t rhport)
static void handle_epin_irq (uint8_t rhport) static void handle_epin_irq (uint8_t rhport)
{ {
dwc2_regs_t *dwc2 = DWC2_REG(rhport); dwc2_regs_t * dwc2 = DWC2_REG(rhport);
dwc2_epin_t* epin = dwc2->epin; uint8_t const ep_count = _dwc2_controller[rhport].ep_count;
dwc2_epin_t* epin = dwc2->epin;
// DAINT for a given EP clears when DIEPINTx is cleared. // DAINT for a given EP clears when DIEPINTx is cleared.
// IEPINT will be cleared when DAINT's out bits are cleared. // IEPINT will be cleared when DAINT's out bits are cleared.
for ( uint8_t n = 0; n < DWC2_EP_MAX; n++ ) for ( uint8_t n = 0; n < ep_count; n++ )
{ {
if ( dwc2->daint & TU_BIT(DAINT_IEPINT_Pos + n) ) if ( dwc2->daint & TU_BIT(DAINT_IEPINT_Pos + n) )
{ {
+7 -6
View File
@@ -35,9 +35,12 @@
#include "broadcom/interrupts.h" #include "broadcom/interrupts.h"
#include "broadcom/caches.h" #include "broadcom/caches.h"
#define DWC2_REG_BASE USB_OTG_GLOBAL_BASE
#define DWC2_EP_MAX 8 #define DWC2_EP_MAX 8
#define DWC2_EP_FIFO_SIZE 4096
static const dwc2_controller_t _dwc2_controller[] =
{
{ .reg_base = USB_OTG_GLOBAL_BASE, .irqnum = USB_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 4096 }
};
#define dcache_clean(_addr, _size) data_clean(_addr, _size) #define dcache_clean(_addr, _size) data_clean(_addr, _size)
#define dcache_invalidate(_addr, _size) data_invalidate(_addr, _size) #define dcache_invalidate(_addr, _size) data_invalidate(_addr, _size)
@@ -46,15 +49,13 @@
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_enable(uint8_t rhport) static inline void dwc2_dcd_int_enable(uint8_t rhport)
{ {
(void) rhport; BP_EnableIRQ(_dwc2_controller[rhport].irqnum);
BP_EnableIRQ(USB_IRQn);
} }
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_disable (uint8_t rhport) static inline void dwc2_dcd_int_disable (uint8_t rhport)
{ {
(void) rhport; BP_DisableIRQ(_dwc2_controller[rhport].irqnum);
BP_DisableIRQ(USB_IRQn);
} }
static inline void dwc2_remote_wakeup_delay(void) static inline void dwc2_remote_wakeup_delay(void)
+7 -5
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@@ -37,20 +37,22 @@
// EFM32 has custom control register before DWC registers // EFM32 has custom control register before DWC registers
#define DWC2_REG_BASE (USB_BASE + offsetof(USB_TypeDef, GOTGCTL)) #define DWC2_REG_BASE (USB_BASE + offsetof(USB_TypeDef, GOTGCTL))
#define DWC2_EP_MAX 7 #define DWC2_EP_MAX 7
#define DWC2_EP_FIFO_SIZE 2048
static const dwc2_controller_t _dwc2_controller[] =
{
{ .reg_base = DWC2_REG_BASE, .irqnum = USB_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 2048 }
};
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_enable(uint8_t rhport) static inline void dwc2_dcd_int_enable(uint8_t rhport)
{ {
(void) rhport; NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum);
NVIC_EnableIRQ(USB_IRQn);
} }
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_disable (uint8_t rhport) static inline void dwc2_dcd_int_disable (uint8_t rhport)
{ {
(void) rhport; NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum);
NVIC_DisableIRQ(USB_IRQn);
} }
static inline void dwc2_remote_wakeup_delay(void) static inline void dwc2_remote_wakeup_delay(void)
+5 -3
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@@ -37,10 +37,12 @@
//#include "soc/usb_periph.h" //#include "soc/usb_periph.h"
#define DWC2_REG_BASE 0x60080000UL #define DWC2_REG_BASE 0x60080000UL
#define DWC2_EP_MAX 5 // USB_OUT_EP_NUM #define DWC2_EP_MAX 6 // USB_OUT_EP_NUM. TODO ESP32Sx only has 5 tx fifo (5 endpoint IN)
#define DWC2_EP_FIFO_SIZE 1024
// #define EP_FIFO_NUM 5 static const dwc2_controller_t _dwc2_controller[] =
{
{ .reg_base = DWC2_REG_BASE, .irqnum = 0, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 1024 }
};
static intr_handle_t usb_ih; static intr_handle_t usb_ih;
+7 -6
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@@ -34,8 +34,11 @@
#define DWC2_REG_BASE 0x50000000UL #define DWC2_REG_BASE 0x50000000UL
#define DWC2_EP_MAX 4 #define DWC2_EP_MAX 4
#define DWC2_EP_FIFO_SIZE 1280
#define RHPORT_IRQn 86 static const dwc2_controller_t _dwc2_controller[] =
{
{ .reg_base = DWC2_REG_BASE, .irqnum = 86, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 1280 }
};
extern uint32_t SystemCoreClock; extern uint32_t SystemCoreClock;
@@ -57,15 +60,13 @@ static inline void __eclic_disable_interrupt (uint32_t irq){
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_enable(uint8_t rhport) static inline void dwc2_dcd_int_enable(uint8_t rhport)
{ {
(void) rhport; __eclic_enable_interrupt(_dwc2_controller[rhport].irqnum);
__eclic_enable_interrupt(RHPORT_IRQn);
} }
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_disable (uint8_t rhport) static inline void dwc2_dcd_int_disable (uint8_t rhport)
{ {
(void) rhport; __eclic_disable_interrupt(_dwc2_controller[rhport].irqnum);
__eclic_disable_interrupt(RHPORT_IRQn);
} }
static inline void dwc2_remote_wakeup_delay(void) static inline void dwc2_remote_wakeup_delay(void)
+29 -22
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@@ -47,6 +47,7 @@
#include "stm32f4xx.h" #include "stm32f4xx.h"
#define EP_MAX_FS USB_OTG_FS_MAX_IN_ENDPOINTS #define EP_MAX_FS USB_OTG_FS_MAX_IN_ENDPOINTS
#define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE #define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE
#define EP_MAX_HS USB_OTG_HS_MAX_IN_ENDPOINTS #define EP_MAX_HS USB_OTG_HS_MAX_IN_ENDPOINTS
#define EP_FIFO_SIZE_HS USB_OTG_HS_TOTAL_FIFO_SIZE #define EP_FIFO_SIZE_HS USB_OTG_HS_TOTAL_FIFO_SIZE
@@ -54,19 +55,18 @@
#include "stm32h7xx.h" #include "stm32h7xx.h"
#define EP_MAX_FS 9 #define EP_MAX_FS 9
#define EP_FIFO_SIZE_FS 4096 #define EP_FIFO_SIZE_FS 4096
#define EP_MAX_HS 9 #define EP_MAX_HS 9
#define EP_FIFO_SIZE_HS 4096 #define EP_FIFO_SIZE_HS 4096
#if (! defined USB2_OTG_FS)
// H7 with only 1 USB port: H72x / H73x / H7Ax / H7Bx // NOTE: H7 with only 1 USB port: H72x / H73x / H7Ax / H7Bx
// USB_OTG_FS_PERIPH_BASE and OTG_FS_IRQn not defined // USB_OTG_FS_PERIPH_BASE and OTG_FS_IRQn not defined
#define USB_OTG_FS_PERIPH_BASE USB1_OTG_HS_PERIPH_BASE
#define OTG_FS_IRQn OTG_HS_IRQn
#endif
#elif CFG_TUSB_MCU == OPT_MCU_STM32F7 #elif CFG_TUSB_MCU == OPT_MCU_STM32F7
#include "stm32f7xx.h" #include "stm32f7xx.h"
#define EP_MAX_FS 6 #define EP_MAX_FS 6
#define EP_FIFO_SIZE_FS 1280 #define EP_FIFO_SIZE_FS 1280
#define EP_MAX_HS 9 #define EP_MAX_HS 9
#define EP_FIFO_SIZE_HS 4096 #define EP_FIFO_SIZE_HS 4096
@@ -79,35 +79,42 @@
#error "Unsupported MCUs" #error "Unsupported MCUs"
#endif #endif
// On STM32 we associate Port0 to OTG_FS, and Port1 to OTG_HS // OTG HS always has higher number of endpoints than FS
#if TUD_OPT_RHPORT == 0 #ifdef USB_OTG_HS_PERIPH_BASE
#define DWC2_REG_BASE USB_OTG_FS_PERIPH_BASE #define DWC2_EP_MAX EP_MAX_HS
#define DWC2_EP_MAX EP_MAX_FS
#define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_FS
#define RHPORT_IRQn OTG_FS_IRQn
#else #else
#define DWC2_REG_BASE USB_OTG_HS_PERIPH_BASE #define DWC2_EP_MAX EP_MAX_FS
#define DWC2_EP_MAX EP_MAX_HS
#define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_HS
#define RHPORT_IRQn OTG_HS_IRQn
#endif #endif
// On STM32 for consistency we associate
// - Port0 to OTG_FS, and Port1 to OTG_HS
static const dwc2_controller_t _dwc2_controller[] =
{
#ifdef USB_OTG_FS_PERIPH_BASE
{ .reg_base = USB_OTG_FS_PERIPH_BASE, .irqnum = OTG_FS_IRQn, .ep_count = EP_MAX_FS, .ep_fifo_size = EP_FIFO_SIZE_FS },
#endif
#ifdef USB_OTG_HS_PERIPH_BASE
{ .reg_base = USB_OTG_HS_PERIPH_BASE, .irqnum = OTG_HS_IRQn, .ep_count = EP_MAX_HS, .ep_fifo_size = EP_FIFO_SIZE_HS },
#endif
};
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
extern uint32_t SystemCoreClock; extern uint32_t SystemCoreClock;
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_enable(uint8_t rhport) static inline void dwc2_dcd_int_enable(uint8_t rhport)
{ {
(void) rhport; NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum);
NVIC_EnableIRQ(RHPORT_IRQn);
} }
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_disable (uint8_t rhport) static inline void dwc2_dcd_int_disable (uint8_t rhport)
{ {
(void) rhport; NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum);
NVIC_DisableIRQ(RHPORT_IRQn);
} }
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
+13 -4
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@@ -19,6 +19,19 @@
#include "stdint.h" #include "stdint.h"
#ifdef __cplusplus
extern "C" {
#endif
// Controller
typedef struct
{
uintptr_t reg_base;
uint32_t irqnum;
uint8_t ep_count;
uint32_t ep_fifo_size;
}dwc2_controller_t;
/* DWC OTG HW Release versions */ /* DWC OTG HW Release versions */
#define DWC2_CORE_REV_2_71a 0x4f54271a #define DWC2_CORE_REV_2_71a 0x4f54271a
#define DWC2_CORE_REV_2_72a 0x4f54272a #define DWC2_CORE_REV_2_72a 0x4f54272a
@@ -40,10 +53,6 @@
#define DWC2_FS_IOT_ID 0x55310000 #define DWC2_FS_IOT_ID 0x55310000
#define DWC2_HS_IOT_ID 0x55320000 #define DWC2_HS_IOT_ID 0x55320000
#ifdef __cplusplus
extern "C" {
#endif
#if 0 #if 0
// HS PHY // HS PHY
typedef struct typedef struct
+8 -7
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@@ -34,23 +34,24 @@
#include "xmc_device.h" #include "xmc_device.h"
// XMC has custom control register before DWC registers
#define DWC2_REG_BASE USB0_BASE
#define DWC2_EP_MAX 7 #define DWC2_EP_MAX 7
#define DWC2_EP_FIFO_SIZE 2048
static const dwc2_controller_t _dwc2_controller[] =
{
// Note: XMC has some custom control registers before DWC registers
{ .reg_base = USB0_BASE, .irqnum = USB0_0_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 2048 }
};
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_enable(uint8_t rhport) static inline void dwc2_dcd_int_enable(uint8_t rhport)
{ {
(void) rhport; NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum);
NVIC_EnableIRQ(USB0_0_IRQn);
} }
TU_ATTR_ALWAYS_INLINE TU_ATTR_ALWAYS_INLINE
static inline void dwc2_dcd_int_disable (uint8_t rhport) static inline void dwc2_dcd_int_disable (uint8_t rhport)
{ {
(void) rhport; NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum);
NVIC_DisableIRQ(USB0_0_IRQn);
} }
static inline void dwc2_remote_wakeup_delay(void) static inline void dwc2_remote_wakeup_delay(void)
+6 -4
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@@ -38,12 +38,14 @@
bool tusb_init(void) bool tusb_init(void)
{ {
#if CFG_TUD_ENABLED #if CFG_TUD_ENABLED && defined(TUD_OPT_RHPORT)
TU_ASSERT ( tud_init(TUD_OPT_RHPORT) ); // init device stack // init device stack CFG_TUSB_RHPORTx_MODE must be defined
TU_ASSERT ( tud_init(TUD_OPT_RHPORT) );
#endif #endif
#if CFG_TUH_ENABLED #if CFG_TUH_ENABLED && defined(TUH_OPT_RHPORT)
TU_ASSERT( tuh_init(TUH_OPT_RHPORT) ); // init host stack // init host stack CFG_TUSB_RHPORTx_MODE must be defined
TU_ASSERT( tuh_init(TUH_OPT_RHPORT) );
#endif #endif
return true; return true;
+27 -25
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@@ -195,46 +195,37 @@ typedef int make_iso_compilers_happy ;
#define OPT_MODE_HIGH_SPEED 0x0400 ///< High Speed #define OPT_MODE_HIGH_SPEED 0x0400 ///< High Speed
#define OPT_MODE_SPEED_MASK 0xff00 #define OPT_MODE_SPEED_MASK 0xff00
#ifndef CFG_TUSB_RHPORT0_MODE
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_NONE
#endif
#ifndef CFG_TUSB_RHPORT1_MODE
#define CFG_TUSB_RHPORT1_MODE OPT_MODE_NONE
#endif
#if (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST ) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST )) || \
(((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE))
#error "TinyUSB currently does not support same modes on more than 1 roothub port"
#endif
//------------- Roothub as Device -------------// //------------- Roothub as Device -------------//
#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE #if defined(CFG_TUSB_RHPORT0_MODE) && ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE)
#define TUD_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE) #define TUD_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE)
#define TUD_OPT_RHPORT 0 #define TUD_OPT_RHPORT 0
#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE #elif defined(CFG_TUSB_RHPORT1_MODE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE)
#define TUD_RHPORT_MODE (CFG_TUSB_RHPORT1_MODE) #define TUD_RHPORT_MODE (CFG_TUSB_RHPORT1_MODE)
#define TUD_OPT_RHPORT 1 #define TUD_OPT_RHPORT 1
#else #else
#define TUD_RHPORT_MODE OPT_MODE_NONE #define TUD_RHPORT_MODE OPT_MODE_NONE
#define TUD_OPT_RHPORT -1
#endif #endif
#define CFG_TUD_ENABLED (TUD_RHPORT_MODE & OPT_MODE_DEVICE) #ifndef CFG_TUD_ENABLED
// fallback to use CFG_TUSB_RHPORTx_MODE
#if CFG_TUD_ENABLED #define CFG_TUD_ENABLED (TUD_RHPORT_MODE & OPT_MODE_DEVICE)
#define TUD_OPT_HIGH_SPEED ((TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (TUP_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)))
#else
#define TUD_OPT_HIGH_SPEED 0
#endif #endif
#ifndef CFG_TUD_MAX_SPEED
// fallback to use CFG_TUSB_RHPORTx_MODE
#define CFG_TUD_MAX_SPEED (TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK)
#endif
// highspeed support indicator
#define TUD_OPT_HIGH_SPEED (CFG_TUD_MAX_SPEED ? CFG_TUD_MAX_SPEED : TUP_RHPORT_HIGHSPEED)
//------------- Roothub as Host -------------// //------------- Roothub as Host -------------//
#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST #if defined(CFG_TUSB_RHPORT0_MODE) && ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST)
#define TUH_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE) #define TUH_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE)
#define TUH_OPT_RHPORT 0 #define TUH_OPT_RHPORT 0
#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST #elif defined(CFG_TUSB_RHPORT1_MODE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST)
#define TUH_RHPORT_MODE (CFG_TUSB_RHPORT1_MODE) #define TUH_RHPORT_MODE (CFG_TUSB_RHPORT1_MODE)
#define TUH_OPT_RHPORT 1 #define TUH_OPT_RHPORT 1
#else #else
@@ -242,13 +233,24 @@ typedef int make_iso_compilers_happy ;
#define TUH_OPT_RHPORT -1 #define TUH_OPT_RHPORT -1
#endif #endif
#define CFG_TUH_ENABLED (TUH_RHPORT_MODE & OPT_MODE_HOST) #ifndef CFG_TUH_ENABLED
// fallback to use CFG_TUSB_RHPORTx_MODE
#define CFG_TUH_ENABLED (TUH_RHPORT_MODE & OPT_MODE_HOST)
#endif
#ifndef CFG_TUH_MAX_SPEED
// fallback to use CFG_TUSB_RHPORTx_MODE
#define CFG_TUH_MAX_SPEED (TUH_RHPORT_MODE & OPT_MODE_SPEED_MASK)
#endif
// For backward compatible // For backward compatible
#define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED #define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED
#define TUSB_OPT_HOST_ENABLED CFG_TUH_ENABLED #define TUSB_OPT_HOST_ENABLED CFG_TUH_ENABLED
//--------------------------------------------------------------------+
// TODO move later // TODO move later
//--------------------------------------------------------------------+
// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN. // TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN.
// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler // In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler
// to generate unaligned access code. // to generate unaligned access code.