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change MCU to TUSB_CFG_MCU

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This commit is contained in:
hathach
2013-11-25 12:48:27 +07:00
parent 41ffcaf4a5
commit a5ba283557
27 changed files with 84 additions and 115 deletions
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demos/device/device_os_none/.cproject
+35 -68
View File
@@ -34,7 +34,7 @@
<option id="com.crt.advproject.gcc.thumb.697143257" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
<option id="gnu.c.compiler.option.preprocessor.def.symbols.371325215" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
<listOptionValue builtIn="false" value="__REDLIB__"/>
<listOptionValue builtIn="false" value="MCU=MCU_LPC13UXX"/>
<listOptionValue builtIn="false" value="TUSB_CFG_MCU=MCU_LPC13UXX"/>
<listOptionValue builtIn="false" value="BOARD=BOARD_LPCXPRESSO1347"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="__CODE_RED"/>
@@ -125,7 +125,7 @@
<option id="gnu.c.compiler.option.preprocessor.def.symbols.690334585" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
<listOptionValue builtIn="false" value="__REDLIB__"/>
<listOptionValue builtIn="false" value="__USE_CMSIS"/>
<listOptionValue builtIn="false" value="MCU=MCU_LPC11UXX"/>
<listOptionValue builtIn="false" value="TUSB_CFG_MCU=MCU_LPC11UXX"/>
<listOptionValue builtIn="false" value="BOARD=BOARD_RF1GHZNODE"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="__CODE_RED"/>
@@ -215,7 +215,7 @@
<listOptionValue builtIn="false" value="__REDLIB__"/>
<listOptionValue builtIn="false" value="__USE_CMSIS"/>
<listOptionValue builtIn="false" value="CORE_M4"/>
<listOptionValue builtIn="false" value="MCU=MCU_LPC43XX"/>
<listOptionValue builtIn="false" value="TUSB_CFG_MCU=MCU_LPC43XX"/>
<listOptionValue builtIn="false" value="BOARD=BOARD_EA4357"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="__CODE_RED"/>
@@ -307,7 +307,7 @@
<option id="com.crt.advproject.gcc.thumb.530159727" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
<option id="gnu.c.compiler.option.preprocessor.def.symbols.216849614" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
<listOptionValue builtIn="false" value="__REDLIB__"/>
<listOptionValue builtIn="false" value="MCU=MCU_LPC175X_6X"/>
<listOptionValue builtIn="false" value="TUSB_CFG_MCU=MCU_LPC175X_6X"/>
<listOptionValue builtIn="false" value="BOARD=BOARD_LPCXPRESSO1769"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="__CODE_RED"/>
@@ -372,82 +372,49 @@
<storageModule moduleId="com.crt.config">
<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
&lt;TargetConfig&gt;&#13;
&lt;Properties property_0="" property_2="LPC18x7_43x7_2x512_BootA.cfx" property_3="NXP" property_4="LPC4357" property_count="5" version="1"/&gt;&#13;
&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC4357" flash_driver="LPC18x7_43x7_2x512_BootA.cfx" match_id="0x0" name="LPC4357" stub="crt_emu_lpc18_43_nxp"&gt;&lt;chip&gt;&lt;name&gt;LPC4357&lt;/name&gt;&#13;
&lt;family&gt;LPC43xx&lt;/family&gt;&#13;
&lt;Properties property_0="" property_3="NXP" property_4="LPC1347" property_count="5" version="1"/&gt;&#13;
&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC1347" match_id="0x08020543" name="LPC1347" stub="crt_emu_lpc11_13_nxp"&gt;&lt;chip&gt;&lt;name&gt;LPC1347&lt;/name&gt;&#13;
&lt;family&gt;LPC13xx (12bit ADC)&lt;/family&gt;&#13;
&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
&lt;memory id="RAM" type="RAM"/&gt;&#13;
&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
&lt;memoryInstance derived_from="Flash" id="MFlashA512" location="0x1a000000" size="0x80000"/&gt;&#13;
&lt;memoryInstance derived_from="Flash" id="MFlashB512" location="0x1b000000" size="0x80000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamLoc40" location="0x10080000" size="0xa000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x20000000" size="0x8000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamAHB16" location="0x20008000" size="0x4000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamAHB_ETB16" location="0x2000c000" size="0x4000"/&gt;&#13;
&lt;prog_flash blocksz="0x2000" location="0x1a000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/&gt;&#13;
&lt;prog_flash blocksz="0x10000" location="0x1a010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/&gt;&#13;
&lt;prog_flash blocksz="0x2000" location="0x1b000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/&gt;&#13;
&lt;prog_flash blocksz="0x10000" location="0x1b010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/&gt;&#13;
&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamPeriph2" location="0x20000000" size="0x800"/&gt;&#13;
&lt;prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/&gt;&#13;
&lt;peripheralInstance derived_from="SCT" id="SCT" location="0x40000000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x40002000"/&gt;&#13;
&lt;peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x40004000"/&gt;&#13;
&lt;peripheralInstance derived_from="EMC" id="EMC" location="0x40005000"/&gt;&#13;
&lt;peripheralInstance derived_from="USB0" id="USB0" location="0x40006000"/&gt;&#13;
&lt;peripheralInstance derived_from="USB1" id="USB1" location="0x40007000"/&gt;&#13;
&lt;peripheralInstance derived_from="LCD" id="LCD" location="0x40008000"/&gt;&#13;
&lt;peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x40010000"/&gt;&#13;
&lt;peripheralInstance derived_from="ATIMER" id="ATIMER" location="0x40040000"/&gt;&#13;
&lt;peripheralInstance derived_from="REGFILE" id="REGFILE" location="0x40041000"/&gt;&#13;
&lt;peripheralInstance derived_from="PMC" id="PMC" location="0x40042000"/&gt;&#13;
&lt;peripheralInstance derived_from="CREG" id="CREG" location="0x40043000"/&gt;&#13;
&lt;peripheralInstance derived_from="EVENTROUTER" id="EVENTROUTER" location="0x40044000"/&gt;&#13;
&lt;peripheralInstance derived_from="RTC" id="RTC" location="0x40046000"/&gt;&#13;
&lt;peripheralInstance derived_from="CGU" id="CGU" location="0x40050000"/&gt;&#13;
&lt;peripheralInstance derived_from="CCU1" id="CCU1" location="0x40051000"/&gt;&#13;
&lt;peripheralInstance derived_from="CCU2" id="CCU2" location="0x40052000"/&gt;&#13;
&lt;peripheralInstance derived_from="RGU" id="RGU" location="0x40053000"/&gt;&#13;
&lt;peripheralInstance derived_from="WWDT" id="WWDT" location="0x40080000"/&gt;&#13;
&lt;peripheralInstance derived_from="USART0" id="USART0" location="0x40081000"/&gt;&#13;
&lt;peripheralInstance derived_from="USART2" id="USART2" location="0x400c1000"/&gt;&#13;
&lt;peripheralInstance derived_from="USART3" id="USART3" location="0x400c2000"/&gt;&#13;
&lt;peripheralInstance derived_from="UART1" id="UART1" location="0x40082000"/&gt;&#13;
&lt;peripheralInstance derived_from="SSP0" id="SSP0" location="0x40083000"/&gt;&#13;
&lt;peripheralInstance derived_from="SSP1" id="SSP1" location="0x400c5000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40084000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40085000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x400c3000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x400c4000"/&gt;&#13;
&lt;peripheralInstance derived_from="SCU" id="SCU" location="0x40086000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x40087000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x40088000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40089000"/&gt;&#13;
&lt;peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400a0000"/&gt;&#13;
&lt;peripheralInstance derived_from="I2C0" id="I2C0" location="0x400a1000"/&gt;&#13;
&lt;peripheralInstance derived_from="I2C1" id="I2C1" location="0x400e0000"/&gt;&#13;
&lt;peripheralInstance derived_from="I2S0" id="I2S0" location="0x400a2000"/&gt;&#13;
&lt;peripheralInstance derived_from="I2S1" id="I2S1" location="0x400a3000"/&gt;&#13;
&lt;peripheralInstance derived_from="C-CAN1" id="C-CAN1" location="0x400a4000"/&gt;&#13;
&lt;peripheralInstance derived_from="RITIMER" id="RITIMER" location="0x400c0000"/&gt;&#13;
&lt;peripheralInstance derived_from="QEI" id="QEI" location="0x400c6000"/&gt;&#13;
&lt;peripheralInstance derived_from="GIMA" id="GIMA" location="0x400c7000"/&gt;&#13;
&lt;peripheralInstance derived_from="DAC" id="DAC" location="0x400e1000"/&gt;&#13;
&lt;peripheralInstance derived_from="C-CAN0" id="C-CAN0" location="0x400e2000"/&gt;&#13;
&lt;peripheralInstance derived_from="ADC0" id="ADC0" location="0x400e3000"/&gt;&#13;
&lt;peripheralInstance derived_from="ADC1" id="ADC1" location="0x400e4000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x400f4000"/&gt;&#13;
&lt;peripheralInstance derived_from="I2C" id="I2C" location="0x40000000"/&gt;&#13;
&lt;peripheralInstance derived_from="WWDT" id="WWDT" location="0x40004000"/&gt;&#13;
&lt;peripheralInstance derived_from="USART" id="USART" location="0x40008000"/&gt;&#13;
&lt;peripheralInstance derived_from="CT16B0" id="CT16B0" location="0x4000c000"/&gt;&#13;
&lt;peripheralInstance derived_from="CT16B1" id="CT16B1" location="0x40010000"/&gt;&#13;
&lt;peripheralInstance derived_from="CT32B0" id="CT32B0" location="0x40014000"/&gt;&#13;
&lt;peripheralInstance derived_from="CT32B1" id="CT32B1" location="0x40018000"/&gt;&#13;
&lt;peripheralInstance derived_from="ADC" id="ADC" location="0x4001c000"/&gt;&#13;
&lt;peripheralInstance derived_from="PMU" id="PMU" location="0x40038000"/&gt;&#13;
&lt;peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
&lt;peripheralInstance derived_from="SSP0" id="SSP0" location="0x40040000"/&gt;&#13;
&lt;peripheralInstance derived_from="IOCON" id="IOCON" location="0x40044000"/&gt;&#13;
&lt;peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40048000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
&lt;peripheralInstance derived_from="SSP1" id="SSP1" location="0x40058000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
&lt;peripheralInstance derived_from="RITIMER" id="RITIMER" location="0x40064000"/&gt;&#13;
&lt;peripheralInstance derived_from="USB" id="USB" location="0x40080000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
&lt;/chip&gt;&#13;
&lt;processor&gt;&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;&#13;
&lt;processor&gt;&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
&lt;/processor&gt;&#13;
&lt;link href="nxp_lpc43xx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
&lt;link href="nxp_lpc13Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
&lt;/info&gt;&#13;
&lt;/infoList&gt;&#13;
&lt;/TargetConfig&gt;</projectStorage>
demos/device/device_os_none/mscd_app.h
+1 -1
View File
@@ -61,7 +61,7 @@ enum
DISK_BLOCK_SIZE = 512
};
#if MCU==MCU_LPC11UXX || MCU==MCU_LPC13UXX
#if TUSB_CFG_MCU==MCU_LPC11UXX || TUSB_CFG_MCU==MCU_LPC13UXX
#define MSCD_APP_ROMDISK
#else // defaults is ram disk
#define MSCD_APP_RAMDISK
demos/device/device_os_none/tusb_config.h
+6 -4
View File
@@ -53,6 +53,8 @@
//--------------------------------------------------------------------+
// CONTROLLER CONFIGURATION
//--------------------------------------------------------------------+
//#define TUSB_CFG_MCU will be passed from IDE for easy board/mcu switching
#define TUSB_CFG_CONTROLLER_0_MODE (TUSB_MODE_DEVICE)
#define TUSB_CFG_CONTROLLER_1_MODE (TUSB_MODE_NONE) // TODO not yet tested
@@ -85,7 +87,7 @@
#define TUSB_CFG_DEVICE_HID_MOUSE 0
#define TUSB_CFG_DEVICE_HID_GENERIC 0
#define TUSB_CFG_DEVICE_MSC 1
#define TUSB_CFG_DEVICE_CDC 1
#define TUSB_CFG_DEVICE_CDC 0
//--------------------------------------------------------------------+
@@ -98,11 +100,11 @@
#define TUSB_CFG_OS_TICKS_PER_SECOND 1000
#ifdef __CODE_RED // make use of code red's support for ram region macros
#if (MCU == MCU_LPC11UXX) || (MCU == MCU_LPC13UXX)
#if (TUSB_CFG_MCU == MCU_LPC11UXX) || (TUSB_CFG_MCU == MCU_LPC13UXX)
#define TUSB_RAM_SECTION ".data.$RAM2"
#elif (MCU == MCU_LPC43XX)
#elif (TUSB_CFG_MCU == MCU_LPC43XX)
#define TUSB_RAM_SECTION ".data.$RAM3"
#elif (MCU == MCU_LPC175X_6X)
#elif (TUSB_CFG_MCU == MCU_LPC175X_6X)
#define TUSB_RAM_SECTION ".data.$RAM2"
#else
#error Please define USB RAM section
demos/device/device_os_none/tusb_descriptors.h
+1 -1
View File
@@ -74,7 +74,7 @@
#define EDPT_IN(x) (0x80 | (x))
#define EDPT_OUT(x) (x)
#if MCU == MCU_LPC175X_6X
#if TUSB_CFG_MCU == MCU_LPC175X_6X
//------------- These MCUs's endpoint number has a fixed type -------------//
//------------- CDC -------------//
#define CDC_EDPT_NOTIFICATION_ADDR EDPT_IN (1)