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Merge branch 'master' into host-async-control

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This commit is contained in:
hathach
2020-10-11 16:22:12 +07:00
parent 2b54dcb9f6 6ce5395947
commit b5d4c8185d
113 changed files with 6383 additions and 725 deletions
Download Patch File Download Diff File Expand all files Collapse all files
hw/bsp/adafruit_clue/board.mk
-1
View File
@@ -49,7 +49,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# For uf2 conversion
UF2_FAMILY = 0xADA52840
hw/bsp/arduino_nano33_ble/board.mk
-1
View File
@@ -51,7 +51,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# flash using bossac (as part of Nano33 BSP tools)
# can be found in arduino15/packages/arduino/tools/bossac/
hw/bsp/board_mcu.h
+3 -2
View File
@@ -1,4 +1,4 @@
/*
/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
@@ -52,7 +52,8 @@
#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
#include "nrf.h"
#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || CFG_TUSB_MCU == OPT_MCU_SAMD51
#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X
#include "sam.h"
#elif CFG_TUSB_MCU == OPT_MCU_SAMG
hw/bsp/circuitplayground_bluefruit/board.mk
-1
View File
@@ -49,7 +49,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# For uf2 conversion
UF2_FAMILY = 0xADA52840
hw/bsp/circuitplayground_express/board.mk
-1
View File
@@ -38,7 +38,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = ATSAMD21G18
JLINK_IF = swd
# flash using jlink
flash: $(BUILD)/$(BOARD)-firmware.uf2
hw/bsp/d5035_01/board.mk
+62
View File
@@ -0,0 +1,62 @@
CFLAGS += \
-mthumb \
-mabi=aapcs \
-mlong-calls \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-D__SAME51J19A__ \
-DCONF_CPU_FREQUENCY=80000000 \
-DCONF_GCLK_USB_FREQUENCY=48000000 \
-DCFG_TUSB_MCU=OPT_MCU_SAME5X \
-DD5035_01=1 \
-DBOARD_NAME="\"D5035-01\"" \
-DSVC_Handler=SVCall_Handler
HWREV ?= 1
CFLAGS += -DHWREV=$(HWREV)
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/same51j19a_flash.ld
SRC_C += \
hw/mcu/microchip/same51/gcc/gcc/startup_same51.c \
hw/mcu/microchip/same51/gcc/system_same51.c \
ifdef SYSCALLS
ifneq ($(SYSCALLS),0)
SRC_C += hw/mcu/microchip/same51/hal/utils/src/utils_syscalls.c
endif
endif
ifdef LOG
ifneq ($(LOG),0)
SRC_C += hw/mcu/microchip/same51/hal/utils/src/utils_syscalls.c
endif
endif
INC += \
$(TOP)/hw/mcu/microchip/same51/ \
$(TOP)/hw/mcu/microchip/same51/config \
$(TOP)/hw/mcu/microchip/same51/include \
$(TOP)/hw/mcu/microchip/same51/hal/include \
$(TOP)/hw/mcu/microchip/same51/hal/utils/include \
$(TOP)/hw/mcu/microchip/same51/hpl/port \
$(TOP)/hw/mcu/microchip/same51/hri \
$(TOP)/hw/mcu/microchip/same51/CMSIS/Core/Include
# For TinyUSB port source
VENDOR = microchip
CHIP_FAMILY = samd
# For freeRTOS port source
FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = ATSAME51J19
# flash using jlink
flash: flash-jlink
hw/bsp/d5035_01/d5035_01.c
+353
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@@ -0,0 +1,353 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2020 Jean Gressmann <jean@0x42.de>
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*/
#include <sam.h>
#include "bsp/board.h"
#include <hal/include/hal_gpio.h>
#if CONF_CPU_FREQUENCY != 80000000
# error "CONF_CPU_FREQUENCY" must 80000000
#endif
#if CONF_GCLK_USB_FREQUENCY != 48000000
# error "CONF_GCLK_USB_FREQUENCY" must 48000000
#endif
#if !defined(HWREV)
# error Define "HWREV"
#endif
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_0_Handler (void)
{
tud_int_handler(0);
}
void USB_1_Handler (void)
{
tud_int_handler(0);
}
void USB_2_Handler (void)
{
tud_int_handler(0);
}
void USB_3_Handler (void)
{
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
#define LED_PIN PIN_PA02
#if HWREV < 3
# define BOARD_SERCOM SERCOM5
#else
# define BOARD_SERCOM SERCOM0
#endif
static inline void init_clock(void)
{
/* AUTOWS is enabled by default in REG_NVMCTRL_CTRLA - no need to change the number of wait states when changing the core clock */
#if HWREV == 1
/* configure XOSC1 for a 16MHz crystal connected to XIN1/XOUT1 */
OSCCTRL->XOSCCTRL[1].reg =
OSCCTRL_XOSCCTRL_STARTUP(6) | // 1,953 ms
OSCCTRL_XOSCCTRL_RUNSTDBY |
OSCCTRL_XOSCCTRL_ENALC |
OSCCTRL_XOSCCTRL_IMULT(4) |
OSCCTRL_XOSCCTRL_IPTAT(3) |
OSCCTRL_XOSCCTRL_XTALEN |
OSCCTRL_XOSCCTRL_ENABLE;
while(0 == OSCCTRL->STATUS.bit.XOSCRDY1);
OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(3) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val); /* pre-scaler = 8, input = XOSC1 */
OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(39); /* multiply by 40 -> 80 MHz */
OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(7) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val); /* pre-scaler = 16, input = XOSC1 */
OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
#else // HWREV >= 1
/* configure XOSC0 for a 16MHz crystal connected to XIN0/XOUT0 */
OSCCTRL->XOSCCTRL[0].reg =
OSCCTRL_XOSCCTRL_STARTUP(6) | // 1,953 ms
OSCCTRL_XOSCCTRL_RUNSTDBY |
OSCCTRL_XOSCCTRL_ENALC |
OSCCTRL_XOSCCTRL_IMULT(4) |
OSCCTRL_XOSCCTRL_IPTAT(3) |
OSCCTRL_XOSCCTRL_XTALEN |
OSCCTRL_XOSCCTRL_ENABLE;
while(0 == OSCCTRL->STATUS.bit.XOSCRDY0);
OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(3) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val); /* pre-scaler = 8, input = XOSC1 */
OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(39); /* multiply by 40 -> 80 MHz */
OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(7) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val); /* pre-scaler = 16, input = XOSC1 */
OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
#endif // HWREV
/* configure clock-generator 0 to use DPLL0 as source -> GCLK0 is used for the core */
GCLK->GENCTRL[0].reg =
GCLK_GENCTRL_DIV(0) |
GCLK_GENCTRL_RUNSTDBY |
GCLK_GENCTRL_GENEN |
GCLK_GENCTRL_SRC_DPLL0 | /* DPLL0 */
GCLK_GENCTRL_IDC ;
while(1 == GCLK->SYNCBUSY.bit.GENCTRL0); /* wait for the synchronization between clock domains to be complete */
/* configure clock-generator 1 to use DPLL1 as source -> for use with some peripheral */
GCLK->GENCTRL[1].reg =
GCLK_GENCTRL_DIV(0) |
GCLK_GENCTRL_RUNSTDBY |
GCLK_GENCTRL_GENEN |
GCLK_GENCTRL_SRC_DPLL1 |
GCLK_GENCTRL_IDC ;
while(1 == GCLK->SYNCBUSY.bit.GENCTRL1); /* wait for the synchronization between clock domains to be complete */
/* configure clock-generator 2 to use DPLL0 as source -> for use with SERCOM */
GCLK->GENCTRL[2].reg =
GCLK_GENCTRL_DIV(1) | /* 80MHz */
GCLK_GENCTRL_RUNSTDBY |
GCLK_GENCTRL_GENEN |
GCLK_GENCTRL_SRC_DPLL0 |
GCLK_GENCTRL_IDC ;
while(1 == GCLK->SYNCBUSY.bit.GENCTRL2); /* wait for the synchronization between clock domains to be complete */
}
static inline void uart_init(void)
{
#if HWREV < 3
/* configure SERCOM5 on PB02 */
PORT->Group[1].WRCONFIG.reg =
PORT_WRCONFIG_WRPINCFG |
PORT_WRCONFIG_WRPMUX |
PORT_WRCONFIG_PMUX(3) | /* function D */
PORT_WRCONFIG_DRVSTR |
PORT_WRCONFIG_PINMASK(0x0004) | /* PB02 */
PORT_WRCONFIG_PMUXEN;
MCLK->APBDMASK.bit.SERCOM5_ = 1;
GCLK->PCHCTRL[SERCOM5_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK2 -> 80MHz */
SERCOM5->USART.CTRLA.reg = 0x00; /* disable SERCOM -> enable config */
while(SERCOM5->USART.SYNCBUSY.bit.ENABLE);
SERCOM5->USART.CTRLA.reg = /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
// SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
SERCOM_USART_CTRLA_DORD | /* LSB first */
SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
SERCOM5->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
SERCOM_USART_CTRLB_TXEN; /* transmitter enabled */
SERCOM5->USART.CTRLC.reg = 0x00;
// 21.701388889 @ baud rate of 230400 bit/s, table 33-2, p 918 of DS60001507E
SERCOM5->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(7) | SERCOM_USART_BAUD_FRAC_BAUD(21);
// SERCOM5->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
SERCOM5->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
while(SERCOM5->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
#else
/* configure SERCOM0 on PA08 */
PORT->Group[0].WRCONFIG.reg =
PORT_WRCONFIG_WRPINCFG |
PORT_WRCONFIG_WRPMUX |
PORT_WRCONFIG_PMUX(2) | /* function C */
PORT_WRCONFIG_DRVSTR |
PORT_WRCONFIG_PINMASK(0x0100) | /* PA08 */
PORT_WRCONFIG_PMUXEN;
MCLK->APBAMASK.bit.SERCOM0_ = 1;
GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK2 -> 80MHz */
SERCOM0->USART.CTRLA.reg = 0x00; /* disable SERCOM -> enable config */
while(SERCOM0->USART.SYNCBUSY.bit.ENABLE);
SERCOM0->USART.CTRLA.reg = /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
// SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
SERCOM_USART_CTRLA_DORD | /* LSB first */
SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
SERCOM0->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
SERCOM_USART_CTRLB_TXEN; /* transmitter enabled */
SERCOM0->USART.CTRLC.reg = 0x00;
// 21.701388889 @ baud rate of 230400 bit/s, table 33-2, p 918 of DS60001507E
SERCOM0->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(7) | SERCOM_USART_BAUD_FRAC_BAUD(21);
// SERCOM0->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
SERCOM0->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
while(SERCOM0->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
#endif
}
static inline void uart_send_buffer(uint8_t const *text, size_t len)
{
for (size_t i = 0; i < len; ++i) {
BOARD_SERCOM->USART.DATA.reg = text[i];
while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0);
}
}
static inline void uart_send_str(const char* text)
{
while (*text) {
BOARD_SERCOM->USART.DATA.reg = *text++;
while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0);
}
}
void board_init(void)
{
init_clock();
SystemCoreClock = CONF_CPU_FREQUENCY;
#if CFG_TUSB_OS == OPT_OS_NONE
SysTick_Config(CONF_CPU_FREQUENCY / 1000);
#endif
uart_init();
#if CFG_TUSB_DEBUG >= 2
uart_send_str(BOARD_NAME " UART initialized\n");
tu_printf(BOARD_NAME " reset cause %#02x\n", RSTC->RCAUSE.reg);
#endif
// Led init
gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
gpio_set_pin_level(LED_PIN, 0);
#if CFG_TUSB_DEBUG >= 2
uart_send_str(BOARD_NAME " LED pin configured\n");
#endif
#if CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(USB_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(USB_2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(USB_3_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
#if TUSB_OPT_DEVICE_ENABLED
#if CFG_TUSB_DEBUG >= 2
uart_send_str(BOARD_NAME " USB device enabled\n");
#endif
/* USB clock init
* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
* for low speed and full speed operation. */
hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
hri_mclk_set_AHBMASK_USB_bit(MCLK);
hri_mclk_set_APBBMASK_USB_bit(MCLK);
// USB pin init
gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
gpio_set_pin_level(PIN_PA24, false);
gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF);
gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT);
gpio_set_pin_level(PIN_PA25, false);
gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF);
gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM);
gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP);
#if CFG_TUSB_DEBUG >= 2
uart_send_str(BOARD_NAME " USB device configured\n");
#endif
#endif
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
gpio_set_pin_level(LED_PIN, state);
}
uint32_t board_button_read(void)
{
// this board has no button
return 0;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
if (len < 0) {
uart_send_str(buf);
} else {
uart_send_buffer(buf, len);
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void)
{
}
hw/bsp/d5035_01/same51j19a_flash.ld
+163
View File
@@ -0,0 +1,163 @@
/**
* \file
*
* \brief Linker script for running in internal FLASH on the SAME51J19A
*
* Copyright (c) 2019 Microchip Technology Inc.
*
* \asf_license_start
*
* \page License
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the Licence at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* \asf_license_stop
*
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00030000
bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000
qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_sfixed = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
_efixed = .; /* End of text section */
} > rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > rom
PROVIDE_HIDDEN (__exidx_end = .);
. = ALIGN(4);
_etext = .;
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
.bkupram (NOLOAD):
{
. = ALIGN(8);
_sbkupram = .;
*(.bkupram .bkupram.*);
. = ALIGN(8);
_ebkupram = .;
} > bkupram
.qspi (NOLOAD):
{
. = ALIGN(8);
_sqspi = .;
*(.qspi .qspi.*);
. = ALIGN(8);
_eqspi = .;
} > qspi
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
} > ram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
. = ALIGN(8);
_estack = .;
} > ram
. = ALIGN(4);
_end = . ;
}
hw/bsp/da14695_dk_usb/board.mk
-1
View File
@@ -38,7 +38,6 @@ FREERTOS_PORT = ARM_CM33_NTZ/non_secure
# For flash-jlink target
JLINK_DEVICE = DA14695
JLINK_IF = swd
# flash using jlink but with some twists
flash: flash-dialog
hw/bsp/da1469x_dk_pro/board.mk
-1
View File
@@ -38,7 +38,6 @@ FREERTOS_PORT = ARM_CM33_NTZ/non_secure
# For flash-jlink target
JLINK_DEVICE = DA14699
JLINK_IF = swd
# flash using jlink but with some twists
flash: flash-dialog
hw/bsp/ea4088qs/board.mk
-1
View File
@@ -42,7 +42,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = LPC4088
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/ea4357/board.mk
-1
View File
@@ -42,7 +42,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = LPC4357_M4
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/esp32s2_kaluga_1/esp32s2_kaluga_1.c
+30 -8
View File
@@ -25,11 +25,11 @@
*/
#include "../board.h"
#include "driver/gpio.h"
#include "driver/periph_ctrl.h"
#include "esp_rom_gpio.h"
#include "hal/gpio_ll.h"
#include "hal/usb_hal.h"
#include "soc/usb_periph.h"
#include "driver/periph_ctrl.h"
#include "driver/rmt.h"
#include "led_strip/include/led_strip.h"
@@ -38,11 +38,10 @@
//--------------------------------------------------------------------+
#define LED_PIN 45
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
static void configure_pins(usb_hal_context_t *usb);
static led_strip_t *strip;
// Initialize on-board peripherals : led, button, uart and USB
@@ -72,10 +71,33 @@ void board_init(void)
.use_external_phy = false // use built-in PHY
};
usb_hal_init(&hal);
configure_pins(&hal);
}
// Pin drive strength
gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
static void configure_pins(usb_hal_context_t *usb)
{
/* usb_periph_iopins currently configures USB_OTG as USB Device.
* Introduce additional parameters in usb_hal_context_t when adding support
* for USB Host.
*/
for (const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) {
esp_rom_gpio_pad_select_gpio(iopin->pin);
if (iopin->is_output) {
esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false);
} else {
esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false);
if ((iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH)) {
gpio_ll_input_enable(&GPIO, iopin->pin);
}
}
esp_rom_gpio_pad_unhold(iopin->pin);
}
}
if (!usb->use_external_phy) {
gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
}
}
// Turn LED on or off
hw/bsp/esp32s2_saola_1/esp32s2_saola_1.c
+30 -7
View File
@@ -25,11 +25,12 @@
*/
#include "../board.h"
#include "driver/gpio.h"
#include "driver/periph_ctrl.h"
#include "esp_rom_gpio.h"
#include "hal/gpio_ll.h"
#include "hal/usb_hal.h"
#include "soc/usb_periph.h"
#include "driver/periph_ctrl.h"
#include "driver/rmt.h"
#include "led_strip/include/led_strip.h"
@@ -41,11 +42,10 @@
// however earlier revision v1.1 WS2812 is connected to GPIO 17
//#define LED_PIN 17 // v1.1
#define LED_PIN 18 // v1.2 and later
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
static void configure_pins(usb_hal_context_t *usb);
static led_strip_t *strip;
// Initialize on-board peripherals : led, button, uart and USB
@@ -75,10 +75,33 @@ void board_init(void)
.use_external_phy = false // use built-in PHY
};
usb_hal_init(&hal);
configure_pins(&hal);
}
// Pin drive strength
gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
static void configure_pins(usb_hal_context_t *usb)
{
/* usb_periph_iopins currently configures USB_OTG as USB Device.
* Introduce additional parameters in usb_hal_context_t when adding support
* for USB Host.
*/
for (const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) {
esp_rom_gpio_pad_select_gpio(iopin->pin);
if (iopin->is_output) {
esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false);
} else {
esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false);
if ((iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH)) {
gpio_ll_input_enable(&GPIO, iopin->pin);
}
}
esp_rom_gpio_pad_unhold(iopin->pin);
}
}
if (!usb->use_external_phy) {
gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
}
}
// Turn LED on or off
hw/bsp/feather_m0_express/board.mk
-1
View File
@@ -39,7 +39,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = ATSAMD21G18
JLINK_IF = swd
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
hw/bsp/feather_m4_express/board.mk
-1
View File
@@ -42,7 +42,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = ATSAMD51J19
JLINK_IF = swd
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
hw/bsp/feather_nrf52840_express/board.mk
-1
View File
@@ -50,7 +50,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# For uf2 conversion
UF2_FAMILY = 0xADA52840
hw/bsp/feather_nrf52840_sense/board.mk
-1
View File
@@ -49,7 +49,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# For uf2 conversion
UF2_FAMILY = 0xADA52840
hw/bsp/feather_stm32f405/board.mk
-1
View File
@@ -44,7 +44,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32f405rg
JLINK_IF = swd
# Path to STM32 Cube Programmer CLI, should be added into system path
STM32Prog = STM32_Programmer_CLI
hw/bsp/itsybitsy_m0/board.mk
-1
View File
@@ -39,7 +39,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = ATSAMD21G18
JLINK_IF = swd
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
hw/bsp/itsybitsy_m4/board.mk
-1
View File
@@ -42,7 +42,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = ATSAMD51J19
JLINK_IF = swd
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
hw/bsp/itsybitsy_nrf52840/board.mk
-1
View File
@@ -50,7 +50,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# For uf2 conversion
UF2_FAMILY = 0xADA52840
hw/bsp/lpcxpresso11u37/board.mk
-1
View File
@@ -40,7 +40,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = LPC11U37/401
JLINK_IF = swd
# flash using pyocd
flash: $(BUILD)/$(BOARD)-firmware.hex
hw/bsp/lpcxpresso11u68/board.mk
-1
View File
@@ -37,7 +37,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = LPC11U68
JLINK_IF = swd
# flash using pyocd
flash: $(BUILD)/$(BOARD)-firmware.hex
hw/bsp/lpcxpresso1347/board.mk
-1
View File
@@ -40,7 +40,6 @@ FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = LPC1347
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/lpcxpresso1549/board.mk
-1
View File
@@ -40,7 +40,6 @@ FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = LPC1549
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/lpcxpresso1769/board.mk
-1
View File
@@ -39,7 +39,6 @@ FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = LPC1769
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/lpcxpresso51u68/board.mk
-1
View File
@@ -41,7 +41,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = LPC51U68
JLINK_IF = swd
# flash using pyocd (51u68 is not supported yet)
flash: $(BUILD)/$(BOARD)-firmware.hex
hw/bsp/lpcxpresso54114/board.mk
-1
View File
@@ -43,7 +43,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = LPC54114J256_M4
JLINK_IF = swd
# flash using pyocd
flash: $(BUILD)/$(BOARD)-firmware.hex
hw/bsp/lpcxpresso55s69/board.mk
-1
View File
@@ -43,7 +43,6 @@ FREERTOS_PORT = ARM_CM33_NTZ/non_secure
# For flash-jlink target
JLINK_DEVICE = LPC55S69
JLINK_IF = swd
# flash using pyocd
flash: $(BUILD)/$(BOARD)-firmware.hex
hw/bsp/luna/board.mk
-1
View File
@@ -39,7 +39,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = ATSAMD21G18
JLINK_IF = swd
# flash using jlink
flash: $(BUILD)/$(BOARD)-firmware.bin
hw/bsp/mbed1768/board.mk
-1
View File
@@ -39,7 +39,6 @@ FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = LPC1768
JLINK_IF = swd
# flash using pyocd
flash: $(BUILD)/$(BOARD)-firmware.hex
hw/bsp/mcb1800/board.mk
-1
View File
@@ -37,7 +37,6 @@ FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = LPC1857
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/metro_m0_express/board.mk
-1
View File
@@ -39,7 +39,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = ATSAMD21G18
JLINK_IF = swd
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
hw/bsp/metro_m4_express/board.mk
-1
View File
@@ -42,7 +42,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = ATSAMD51J19
JLINK_IF = swd
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
hw/bsp/mimxrt1010_evk/board.mk
+8 -4
View File
@@ -19,6 +19,9 @@ MCU_DIR = hw/mcu/nxp/sdk/devices/MIMXRT1011
# All source paths should be relative to the top level.
LD_FILE = $(MCU_DIR)/gcc/MIMXRT1011xxxxx_flexspi_nor.ld
LDFLAGS += \
-Wl,--defsym,__stack_size__=0x800 \
SRC_C += \
$(MCU_DIR)/system_MIMXRT1011.c \
$(MCU_DIR)/xip/fsl_flexspi_nor_boot.c \
@@ -46,8 +49,9 @@ FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = MIMXRT1011DAE5A
JLINK_IF = swd
# flash by copying bin file to DAP Mass Storage
flash: $(BUILD)/$(BOARD)-firmware.bin
cp $< /media/$(USER)/RT1010-EVK/
# For flash-pyocd target
PYOCD_TARGET = mimxrt1010
# flash using pyocd
flash: flash-pyocd
hw/bsp/mimxrt1015_evk/board.mk
+3 -6
View File
@@ -45,12 +45,9 @@ FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = MIMXRT1015DAF5A
JLINK_IF = swd
# flash by copying bin file to DAP Mass Storage
flash: $(BUILD)/$(BOARD)-firmware.bin
cp $< /media/$(USER)/RT1015-EVK/
# For flash-pyocd target
PYOCD_TARGET = mimxrt1015
# flash using pyocd
#flash: $(BUILD)/$(BOARD)-firmware.hex
# pyocd flash -b MIMXRT1015-EVK $<
flash: flash-pyocd
hw/bsp/mimxrt1020_evk/board.mk
+5 -4
View File
@@ -45,8 +45,9 @@ FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = MIMXRT1021DAG5A
JLINK_IF = swd
# flash by copying bin file to DAP Mass Storage
flash: $(BUILD)/$(BOARD)-firmware.bin
cp $< /media/$(USER)/RT1020-EVK/
# For flash-pyocd target
PYOCD_TARGET = mimxrt1020
# flash using pyocd
flash: flash-pyocd
hw/bsp/mimxrt1050_evkb/board.mk
+4 -6
View File
@@ -43,10 +43,8 @@ CHIP_FAMILY = transdimension
# For freeRTOS port source
FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = MIMXRT1052xxx6B
JLINK_IF = swd
# For flash-pyocd target
PYOCD_TARGET = mimxrt1050
# flash by copying bin file to DAP Mass Storage
flash: $(BUILD)/$(BOARD)-firmware.bin
cp $< /media/$(USER)/RT1050-EVK/
# flash using pyocd
flash: flash-pyocd
hw/bsp/mimxrt1060_evk/board.mk
+5 -4
View File
@@ -45,8 +45,9 @@ FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = MIMXRT1062xxx6A
JLINK_IF = swd
# flash by copying bin file to DAP Mass Storage
flash: $(BUILD)/$(BOARD)-firmware.bin
cp $< /media/$(USER)/RT1060-EVK/
# For flash-pyocd target
PYOCD_TARGET = mimxrt1060
# flash using pyocd
flash: flash-pyocd
hw/bsp/mimxrt1064_evk/board.mk
+5 -4
View File
@@ -45,8 +45,9 @@ FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = MIMXRT1064xxx6A
JLINK_IF = swd
# flash by copying bin file to DAP Mass Storage
flash: $(BUILD)/$(BOARD)-firmware.bin
cp $< /media/$(USER)/RT1064-EVK/
# For flash-pyocd target
PYOCD_TARGET = mimxrt1064
# flash using pyocd
flash: flash-pyocd
hw/bsp/nrf52840_mdk_dongle/board.mk
-1
View File
@@ -48,7 +48,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# flash using Nordic nrfutil (pip2 install nrfutil)
# make BOARD=nrf52840_mdk_dongle SERIAL=/dev/ttyACM0 all flash
hw/bsp/nutiny_nuc121s/board.mk
-1
View File
@@ -49,7 +49,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = NUC121SC2AE
JLINK_IF = swd
# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
# Please compile and install it from github source
hw/bsp/nutiny_nuc125s/board.mk
-1
View File
@@ -33,7 +33,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = NUC125SC2AE
JLINK_IF = swd
# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
# Please compile and install it from github source
hw/bsp/nutiny_nuc126v/board.mk
-1
View File
@@ -53,7 +53,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = NUC126VG4AE
JLINK_IF = swd
# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
# Please compile and install it from github source
hw/bsp/nutiny_sdk_nuc120/board.mk
-1
View File
@@ -49,7 +49,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = NUC120LE3
JLINK_IF = swd
# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
# Please compile and install it from github source
hw/bsp/nutiny_sdk_nuc505/board.mk
-1
View File
@@ -44,7 +44,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = NUC505YO13Y
JLINK_IF = swd
# Note
# To be able to program the SPI flash, it need to boot with ICP mode "1011".
hw/bsp/pca10056/board.mk
-1
View File
@@ -50,7 +50,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/pca10059/board.mk
-1
View File
@@ -49,7 +49,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# flash using Nordic nrfutil (pip2 install nrfutil)
# make BOARD=pca10059 SERIAL=/dev/ttyACM0 all flash
hw/bsp/pca10100/board.mk
-1
View File
@@ -50,7 +50,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52833_XXAA
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/pyboardv11/board.mk
-1
View File
@@ -40,7 +40,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32f405rg
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/raytac_mdbt50q_rx/board.mk
-1
View File
@@ -48,7 +48,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = nRF52840_xxAA
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/samd11_xplained/board.mk
+1 -8
View File
@@ -1,7 +1,4 @@
CFLAGS += \
-ffunction-sections \
-fdata-sections \
-Wl,--gc-sections \
-mthumb \
-mabi=aapcs-linux \
-mcpu=cortex-m0plus \
@@ -9,9 +6,7 @@ CFLAGS += \
-D__SAMD11D14AM__ \
-DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
-DOSC32K_OVERWRITE_CALIBRATION=0 \
-DCFG_TUSB_MCU=OPT_MCU_SAMD11 \
-fshort-enums \
-Os
-DCFG_TUSB_MCU=OPT_MCU_SAMD11
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/samd11d14am_flash.ld
@@ -45,9 +40,7 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = ATSAMD11D14
JLINK_IF = swd
# flash using edbg
flash: $(BUILD)/$(BOARD)-firmware.bin
edbg -b -t samd11 -e -pv -f $<
hw/bsp/samg55xplained/board.mk
-1
View File
@@ -47,7 +47,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = ATSAMG55J19
JLINK_IF = swd
# flash using edbg from https://github.com/ataradov/edbg
flash: $(BUILD)/$(BOARD)-firmware.bin
hw/bsp/seeeduino_xiao/board.mk
-1
View File
@@ -39,7 +39,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = ATSAMD21G18
JLINK_IF = swd
# flash using jlink
flash: flash-jlink
hw/bsp/stm32f070rbnucleo/board.mk
-1
View File
@@ -44,7 +44,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = stm32f070rb
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32f072disco/board.mk
-1
View File
@@ -45,7 +45,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = stm32f072rb
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32f103bluepill/board.mk
-1
View File
@@ -43,7 +43,6 @@ FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = stm32f103c8
JLINK_IF = swd
# flash target ROM bootloader
flash: $(BUILD)/$(BOARD)-firmware.bin
hw/bsp/stm32f207nucleo/board.mk
-1
View File
@@ -43,7 +43,6 @@ FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = stm32f207zg
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32f303disco/board.mk
-1
View File
@@ -44,7 +44,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32f303vc
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32f303disco/stm32f303disco.c
+13 -7
View File
@@ -31,27 +31,29 @@
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP)
// USB defaults to using interrupts 19, 20 and 42, however, this BSP sets the
// SYSCFG_CFGR1.USB_IT_RMP bit remapping interrupts to 74, 75 and 76.
// FIXME: Do all three need to be handled, or just the LP one?
// USB high-priority interrupt (Channel 19): Triggered only by a correct
// USB high-priority interrupt (Channel 74): Triggered only by a correct
// transfer event for isochronous and double-buffer bulk transfer to reach
// the highest possible transfer rate.
void USB_HP_CAN_TX_IRQHandler(void)
void USB_HP_IRQHandler(void)
{
tud_int_handler(0);
}
// USB low-priority interrupt (Channel 20): Triggered by all USB events
// USB low-priority interrupt (Channel 75): Triggered by all USB events
// (Correct transfer, USB reset, etc.). The firmware has to check the
// interrupt source before serving the interrupt.
void USB_LP_CAN_RX0_IRQHandler(void)
void USB_LP_IRQHandler(void)
{
tud_int_handler(0);
}
// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB
// USB wakeup interrupt (Channel 76): Triggered by the wakeup event from the USB
// Suspend mode.
void USBWakeUp_IRQHandler(void)
void USBWakeUp_RMP_IRQHandler(void)
{
tud_int_handler(0);
}
@@ -127,6 +129,10 @@ void board_init(void)
SysTick_Config(SystemCoreClock / 1000);
#endif
// Remap the USB interrupts
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_REMAPINTERRUPT_USB_ENABLE();
// LED
__HAL_RCC_GPIOE_CLK_ENABLE();
GPIO_InitTypeDef GPIO_InitStruct;
hw/bsp/stm32f401blackpill/board.mk
-1
View File
@@ -40,7 +40,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32f401cc
JLINK_IF = swd
# flash target ROM bootloader
flash: $(BUILD)/$(BOARD)-firmware.bin
hw/bsp/stm32f407disco/board.mk
-1
View File
@@ -44,7 +44,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32f407vg
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32f411blackpill/board.mk
-1
View File
@@ -40,7 +40,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32f411ce
JLINK_IF = swd
# flash target ROM bootloader
flash: $(BUILD)/$(BOARD)-firmware.bin
hw/bsp/stm32f411disco/board.mk
-1
View File
@@ -44,7 +44,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32f411ve
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32f412disco/board.mk
-1
View File
@@ -45,7 +45,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32f41zx
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32h743eval/board.mk
-1
View File
@@ -57,7 +57,6 @@ FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = stm32h743xi
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32h745disco/board.mk
-1
View File
@@ -52,7 +52,6 @@ FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = stm32h745xi
JLINK_IF = swd
# flash target using on-board stlink
flash: flash-stlink
hw/bsp/stm32l0538disco/board.mk
-1
View File
@@ -44,7 +44,6 @@ FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = STM32L053R8
JLINK_IF = swd
# Path to STM32 Cube Programmer CLI, should be added into system path
STM32Prog = STM32_Programmer_CLI
hw/bsp/stm32l476disco/board.mk
-1
View File
@@ -43,7 +43,6 @@ FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = stm32l476vg
JLINK_IF = swd
# Path to STM32 Cube Programmer CLI, should be added into system path
STM32Prog = STM32_Programmer_CLI
hw/bsp/teensy_40/board.mk
-1
View File
@@ -45,7 +45,6 @@ FREERTOS_PORT = ARM_CM7/r0p1
# For flash-jlink target
JLINK_DEVICE = MIMXRT1062xxx6A
JLINK_IF = swd
# flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli
# Make sure it is in your PATH
hw/mcu/microchip
+1 -1
Submodule hw/mcu/microchip updated: 168322aa71...434e384e8f