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rename dcd 18 43

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This commit is contained in:
hathach
2018-12-04 12:47:58 +07:00
parent d40663d403
commit bf5ac608ff
3 changed files with 695 additions and 696 deletions
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src/portable/nxp/lpc43xx_lpc18xx/dcd_lpc43xx.c → src/portable/nxp/lpc18_43/dcd_lpc18_43.c
+381 -382
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@@ -1,382 +1,381 @@
/**************************************************************************/ /**************************************************************************/
/*! /*!
@file dcd_lpc43xx.c @file dcd_lpc43xx.c
@author hathach (tinyusb.org) @author hathach (tinyusb.org)
@section LICENSE @section LICENSE
Software License Agreement (BSD License) Software License Agreement (BSD License)
Copyright (c) 2013, hathach (tinyusb.org) Copyright (c) 2013, hathach (tinyusb.org)
All rights reserved. All rights reserved.
Redistribution and use in source and binary forms, with or without Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met: modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright 1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer. notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright 2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution. documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holders nor the 3. Neither the name of the copyright holders nor the
names of its contributors may be used to endorse or promote products names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission. derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
This file is part of the tinyusb stack. This file is part of the tinyusb stack.
*/ */
/**************************************************************************/ /**************************************************************************/
#include "tusb_option.h" #include "tusb_option.h"
#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_LPC43XX #if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_LPC43XX
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// INCLUDE // INCLUDE
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
#include "common/tusb_common.h" #include "common/tusb_common.h"
#include "tusb_hal.h" #include "tusb_hal.h"
#include "device/dcd.h" #include "device/dcd.h"
#include "dcd_lpc43xx.h" #include "dcd_lpc43xx.h"
#include "chip.h" #include "chip.h"
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF // MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
typedef struct { typedef struct {
dcd_qhd_t qhd[DCD_QHD_MAX] ATTR_ALIGNED(64); ///< Must be at 2K alignment dcd_qhd_t qhd[DCD_QHD_MAX] ATTR_ALIGNED(64); ///< Must be at 2K alignment
dcd_qtd_t qtd[DCD_QTD_MAX] ATTR_ALIGNED(32); dcd_qtd_t qtd[DCD_QTD_MAX] ATTR_ALIGNED(32);
}dcd_data_t; }dcd_data_t;
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE) #if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(2048) static dcd_data_t dcd_data0; CFG_TUSB_MEM_SECTION ATTR_ALIGNED(2048) static dcd_data_t dcd_data0;
#endif #endif
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE) #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
CFG_TUSB_MEM_SECTION ATTR_ALIGNED(2048) static dcd_data_t dcd_data1; CFG_TUSB_MEM_SECTION ATTR_ALIGNED(2048) static dcd_data_t dcd_data1;
#endif #endif
static LPC_USBHS_T * const LPC_USB[2] = { LPC_USB0, LPC_USB1 }; static LPC_USBHS_T * const LPC_USB[2] = { LPC_USB0, LPC_USB1 };
static dcd_data_t* const dcd_data_ptr[2] = static dcd_data_t* const dcd_data_ptr[2] =
{ {
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE) #if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
&dcd_data0, &dcd_data0,
#else #else
NULL, NULL,
#endif #endif
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE) #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
&dcd_data1 &dcd_data1
#else #else
NULL NULL
#endif #endif
}; };
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// CONTROLLER API // CONTROLLER API
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
void dcd_connect(uint8_t rhport) void dcd_connect(uint8_t rhport)
{ {
LPC_USB[rhport]->USBCMD_D |= BIT_(0); LPC_USB[rhport]->USBCMD_D |= BIT_(0);
} }
void dcd_set_address(uint8_t rhport, uint8_t dev_addr) void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
{ {
LPC_USB[rhport]->DEVICEADDR = (dev_addr << 25) | BIT_(24); LPC_USB[rhport]->DEVICEADDR = (dev_addr << 25) | BIT_(24);
} }
void dcd_set_config(uint8_t rhport, uint8_t config_num) void dcd_set_config(uint8_t rhport, uint8_t config_num)
{ {
// nothing to do // nothing to do
} }
/// follows LPC43xx User Manual 23.10.3 /// follows LPC43xx User Manual 23.10.3
static void bus_reset(uint8_t rhport) static void bus_reset(uint8_t rhport)
{ {
LPC_USBHS_T* const lpc_usb = LPC_USB[rhport]; LPC_USBHS_T* lpc_usb = LPC_USB[rhport];
// The reset value for all endpoint types is the control endpoint. If one endpoint // The reset value for all endpoint types is the control endpoint. If one endpoint
// direction is enabled and the paired endpoint of opposite direction is disabled, then the // direction is enabled and the paired endpoint of opposite direction is disabled, then the
// endpoint type of the unused direction must bechanged from the control type to any other // endpoint type of the unused direction must bechanged from the control type to any other
// type (e.g. bulk). Leaving an unconfigured endpoint control will cause undefined behavior // type (e.g. bulk). Leaving an unconfigured endpoint control will cause undefined behavior
// for the data PID tracking on the active endpoint. // for the data PID tracking on the active endpoint.
// USB0 has 5 but USB1 only has 3 non-control endpoints // USB0 has 5 but USB1 only has 3 non-control endpoints
for( int i=1; i < (rhport ? 6 : 4); i++) for( int i=1; i < (rhport ? 6 : 4); i++)
{ {
lpc_usb->ENDPTCTRL[i] = (TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18); lpc_usb->ENDPTCTRL[i] = (TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
} }
//------------- Clear All Registers -------------// //------------- Clear All Registers -------------//
lpc_usb->ENDPTNAK = lpc_usb->ENDPTNAK; lpc_usb->ENDPTNAK = lpc_usb->ENDPTNAK;
lpc_usb->ENDPTNAKEN = 0; lpc_usb->ENDPTNAKEN = 0;
lpc_usb->USBSTS_D = lpc_usb->USBSTS_D; lpc_usb->USBSTS_D = lpc_usb->USBSTS_D;
lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT; lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;
lpc_usb->ENDPTCOMPLETE = lpc_usb->ENDPTCOMPLETE; lpc_usb->ENDPTCOMPLETE = lpc_usb->ENDPTCOMPLETE;
while (lpc_usb->ENDPTPRIME); while (lpc_usb->ENDPTPRIME);
lpc_usb->ENDPTFLUSH = 0xFFFFFFFF; lpc_usb->ENDPTFLUSH = 0xFFFFFFFF;
while (lpc_usb->ENDPTFLUSH); while (lpc_usb->ENDPTFLUSH);
// read reset bit in portsc // read reset bit in portsc
//------------- Queue Head & Queue TD -------------// //------------- Queue Head & Queue TD -------------//
dcd_data_t* p_dcd = dcd_data_ptr[rhport]; dcd_data_t* p_dcd = dcd_data_ptr[rhport];
tu_memclr(p_dcd, sizeof(dcd_data_t));
tu_memclr(p_dcd, sizeof(dcd_data_t));
//------------- Set up Control Endpoints (0 OUT, 1 IN) -------------//
//------------- Set up Control Endpoints (0 OUT, 1 IN) -------------// p_dcd->qhd[0].zero_length_termination = p_dcd->qhd[1].zero_length_termination = 1;
p_dcd->qhd[0].zero_length_termination = p_dcd->qhd[1].zero_length_termination = 1; p_dcd->qhd[0].max_package_size = p_dcd->qhd[1].max_package_size = CFG_TUD_ENDOINT0_SIZE;
p_dcd->qhd[0].max_package_size = p_dcd->qhd[1].max_package_size = CFG_TUD_ENDOINT0_SIZE; p_dcd->qhd[0].qtd_overlay.next = p_dcd->qhd[1].qtd_overlay.next = QTD_NEXT_INVALID;
p_dcd->qhd[0].qtd_overlay.next = p_dcd->qhd[1].qtd_overlay.next = QTD_NEXT_INVALID;
p_dcd->qhd[0].int_on_setup = 1; // OUT only
p_dcd->qhd[0].int_on_setup = 1; // OUT only }
}
bool dcd_init(uint8_t rhport)
bool dcd_init(uint8_t rhport) {
{ LPC_USBHS_T* const lpc_usb = LPC_USB[rhport];
LPC_USBHS_T* const lpc_usb = LPC_USB[rhport]; dcd_data_t* p_dcd = dcd_data_ptr[rhport];
dcd_data_t* p_dcd = dcd_data_ptr[rhport];
tu_memclr(p_dcd, sizeof(dcd_data_t));
tu_memclr(p_dcd, sizeof(dcd_data_t));
lpc_usb->ENDPOINTLISTADDR = (uint32_t) p_dcd->qhd; // Endpoint List Address has to be 2K alignment
lpc_usb->ENDPOINTLISTADDR = (uint32_t) p_dcd->qhd; // Endpoint List Address has to be 2K alignment lpc_usb->USBSTS_D = lpc_usb->USBSTS_D;
lpc_usb->USBSTS_D = lpc_usb->USBSTS_D; lpc_usb->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND | INT_MASK_SOF;
lpc_usb->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND | INT_MASK_SOF;
lpc_usb->USBCMD_D &= ~0x00FF0000; // Interrupt Threshold Interval = 0
lpc_usb->USBCMD_D &= ~0x00FF0000; // Interrupt Threshold Interval = 0 lpc_usb->USBCMD_D |= BIT_(0); // connect
lpc_usb->USBCMD_D |= BIT_(0); // connect
// enable interrupt
// enable interrupt NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
return true;
return true; }
}
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+ // HELPER
// HELPER //--------------------------------------------------------------------+
//--------------------------------------------------------------------+ // index to bit position in register
// index to bit position in register static inline uint8_t ep_idx2bit(uint8_t ep_idx)
static inline uint8_t ep_idx2bit(uint8_t ep_idx) {
{ return ep_idx/2 + ( (ep_idx%2) ? 16 : 0);
return ep_idx/2 + ( (ep_idx%2) ? 16 : 0); }
}
static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes) {
{ tu_memclr(p_qtd, sizeof(dcd_qtd_t));
tu_memclr(p_qtd, sizeof(dcd_qtd_t));
p_qtd->next = QTD_NEXT_INVALID;
p_qtd->next = QTD_NEXT_INVALID; p_qtd->active = 1;
p_qtd->active = 1; p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes;
p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes;
if (data_ptr != NULL)
if (data_ptr != NULL) {
{ p_qtd->buffer[0] = (uint32_t) data_ptr;
p_qtd->buffer[0] = (uint32_t) data_ptr; for(uint8_t i=1; i<5; i++)
for(uint8_t i=1; i<5; i++) {
{ p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096;
p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096; }
} }
} }
}
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+ // DCD Endpoint Port
// DCD Endpoint Port //--------------------------------------------------------------------+
//--------------------------------------------------------------------+ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
{ uint8_t const epnum = edpt_number(ep_addr);
uint8_t const epnum = edpt_number(ep_addr); uint8_t const dir = edpt_dir(ep_addr);
uint8_t const dir = edpt_dir(ep_addr);
if ( epnum == 0)
if ( epnum == 0) {
{ // Stall both Control IN and OUT
// Stall both Control IN and OUT LPC_USB[rhport]->ENDPTCTRL[epnum] |= ( (ENDPTCTRL_MASK_STALL << 16) || (ENDPTCTRL_MASK_STALL << 0) );
LPC_USB[rhport]->ENDPTCTRL[epnum] |= ( (ENDPTCTRL_MASK_STALL << 16) || (ENDPTCTRL_MASK_STALL << 0) ); }else
}else {
{ LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_STALL << (dir ? 16 : 0);
LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_STALL << (dir ? 16 : 0); }
} }
}
bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) {
{ uint8_t const epnum = edpt_number(ep_addr);
uint8_t const epnum = edpt_number(ep_addr); uint8_t const dir = edpt_dir(ep_addr);
uint8_t const dir = edpt_dir(ep_addr);
return LPC_USB[rhport]->ENDPTCTRL[epnum] & (ENDPTCTRL_MASK_STALL << (dir ? 16 : 0));
return LPC_USB[rhport]->ENDPTCTRL[epnum] & (ENDPTCTRL_MASK_STALL << (dir ? 16 : 0)); }
}
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
{ uint8_t const epnum = edpt_number(ep_addr);
uint8_t const epnum = edpt_number(ep_addr); uint8_t const dir = edpt_dir(ep_addr);
uint8_t const dir = edpt_dir(ep_addr);
// data toggle also need to be reset
// data toggle also need to be reset LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_TOGGLE_RESET << ( dir ? 16 : 0 );
LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_TOGGLE_RESET << ( dir ? 16 : 0 ); LPC_USB[rhport]->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_MASK_STALL << ( dir ? 16 : 0));
LPC_USB[rhport]->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_MASK_STALL << ( dir ? 16 : 0)); }
}
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) {
{ // TODO USB1 only has 4 non-control enpoint (USB0 has 5)
// TODO USB1 only has 4 non-control enpoint (USB0 has 5) // TODO not support ISO yet
// TODO not support ISO yet TU_VERIFY ( p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
TU_VERIFY ( p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
uint8_t const epnum = edpt_number(p_endpoint_desc->bEndpointAddress);
uint8_t const epnum = edpt_number(p_endpoint_desc->bEndpointAddress); uint8_t const dir = edpt_dir(p_endpoint_desc->bEndpointAddress);
uint8_t const dir = edpt_dir(p_endpoint_desc->bEndpointAddress); uint8_t const ep_idx = 2*epnum + dir;
uint8_t const ep_idx = 2*epnum + dir;
//------------- Prepare Queue Head -------------//
//------------- Prepare Queue Head -------------// dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx]; tu_memclr(p_qhd, sizeof(dcd_qhd_t));
tu_memclr(p_qhd, sizeof(dcd_qhd_t));
p_qhd->zero_length_termination = 1;
p_qhd->zero_length_termination = 1; p_qhd->max_package_size = p_endpoint_desc->wMaxPacketSize.size;
p_qhd->max_package_size = p_endpoint_desc->wMaxPacketSize.size; p_qhd->qtd_overlay.next = QTD_NEXT_INVALID;
p_qhd->qtd_overlay.next = QTD_NEXT_INVALID;
// Enable EP Control
// Enable EP Control LPC_USB[rhport]->ENDPTCTRL[epnum] |= ((p_endpoint_desc->bmAttributes.xfer << 2) | ENDPTCTRL_MASK_ENABLE | ENDPTCTRL_MASK_TOGGLE_RESET) << (dir ? 16 : 0);
LPC_USB[rhport]->ENDPTCTRL[epnum] |= ((p_endpoint_desc->bmAttributes.xfer << 2) | ENDPTCTRL_MASK_ENABLE | ENDPTCTRL_MASK_TOGGLE_RESET) << (dir ? 16 : 0);
return true;
return true; }
}
bool dcd_edpt_busy(uint8_t rhport, uint8_t ep_addr)
bool dcd_edpt_busy(uint8_t rhport, uint8_t ep_addr) {
{ uint8_t const epnum = edpt_number(ep_addr);
uint8_t const epnum = edpt_number(ep_addr); uint8_t const dir = edpt_dir(ep_addr);
uint8_t const dir = edpt_dir(ep_addr); uint8_t const ep_idx = 2*epnum + dir;
uint8_t const ep_idx = 2*epnum + dir;
dcd_qhd_t const * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
dcd_qhd_t const * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx]; dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx];
dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx];
return p_qtd->active;
return p_qtd->active; // return !p_qhd->qtd_overlay.halted && p_qhd->qtd_overlay.active;
// return !p_qhd->qtd_overlay.halted && p_qhd->qtd_overlay.active; }
}
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) {
{ uint8_t const epnum = edpt_number(ep_addr);
uint8_t const epnum = edpt_number(ep_addr); uint8_t const dir = edpt_dir(ep_addr);
uint8_t const dir = edpt_dir(ep_addr); uint8_t const ep_idx = 2*epnum + dir;
uint8_t const ep_idx = 2*epnum + dir;
if ( epnum == 0 )
if ( epnum == 0 ) {
{ // follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
// follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism // wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out
// wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out while(LPC_USB[rhport]->ENDPTSETUPSTAT & BIT_(0)) {}
while(LPC_USB[rhport]->ENDPTSETUPSTAT & BIT_(0)) {} }
}
dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx]; dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx];
dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx];
//------------- Prepare qtd -------------//
//------------- Prepare qtd -------------// qtd_init(p_qtd, buffer, total_bytes);
qtd_init(p_qtd, buffer, total_bytes); p_qtd->int_on_complete = true;
p_qtd->int_on_complete = true; p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd
p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd
// start transfer
// start transfer LPC_USB[rhport]->ENDPTPRIME = BIT_( ep_idx2bit(ep_idx) ) ;
LPC_USB[rhport]->ENDPTPRIME = BIT_( ep_idx2bit(ep_idx) ) ;
return true;
return true; }
}
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+ // ISR
// ISR //--------------------------------------------------------------------+
//--------------------------------------------------------------------+ void hal_dcd_isr(uint8_t rhport)
void hal_dcd_isr(uint8_t rhport) {
{ LPC_USBHS_T* const lpc_usb = LPC_USB[rhport];
LPC_USBHS_T* const lpc_usb = LPC_USB[rhport];
uint32_t const int_enable = lpc_usb->USBINTR_D;
uint32_t const int_enable = lpc_usb->USBINTR_D; uint32_t const int_status = lpc_usb->USBSTS_D & int_enable;
uint32_t const int_status = lpc_usb->USBSTS_D & int_enable; lpc_usb->USBSTS_D = int_status; // Acknowledge handled interrupt
lpc_usb->USBSTS_D = int_status; // Acknowledge handled interrupt
if (int_status == 0) return;// disabled interrupt sources
if (int_status == 0) return;// disabled interrupt sources
if (int_status & INT_MASK_RESET)
if (int_status & INT_MASK_RESET) {
{ bus_reset(rhport);
bus_reset(rhport); dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true);
dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true); }
}
if (int_status & INT_MASK_SUSPEND)
if (int_status & INT_MASK_SUSPEND) {
{ if (lpc_usb->PORTSC1_D & PORTSC_SUSPEND_MASK)
if (lpc_usb->PORTSC1_D & PORTSC_SUSPEND_MASK) {
{ // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
// Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. if ((lpc_usb->DEVICEADDR >> 25) & 0x0f)
if ((lpc_usb->DEVICEADDR >> 25) & 0x0f) {
{ dcd_event_bus_signal(rhport, DCD_EVENT_SUSPENDED, true);
dcd_event_bus_signal(rhport, DCD_EVENT_SUSPENDED, true); }
} }
} }
}
// TODO disconnection does not generate interrupt !!!!!!
// TODO disconnection does not generate interrupt !!!!!! // if (int_status & INT_MASK_PORT_CHANGE)
// if (int_status & INT_MASK_PORT_CHANGE) // {
// { // if ( !(lpc_usb->PORTSC1_D & PORTSC_CURRENT_CONNECT_STATUS_MASK) )
// if ( !(lpc_usb->PORTSC1_D & PORTSC_CURRENT_CONNECT_STATUS_MASK) ) // {
// { // dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_UNPLUGGED };
// dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_UNPLUGGED }; // dcd_event_handler(&event, true);
// dcd_event_handler(&event, true); // }
// } // }
// }
if (int_status & INT_MASK_USB)
if (int_status & INT_MASK_USB) {
{ uint32_t const edpt_complete = lpc_usb->ENDPTCOMPLETE;
uint32_t const edpt_complete = lpc_usb->ENDPTCOMPLETE; lpc_usb->ENDPTCOMPLETE = edpt_complete; // acknowledge
lpc_usb->ENDPTCOMPLETE = edpt_complete; // acknowledge
dcd_data_t* const p_dcd = dcd_data_ptr[rhport];
dcd_data_t* const p_dcd = dcd_data_ptr[rhport];
if (lpc_usb->ENDPTSETUPSTAT)
if (lpc_usb->ENDPTSETUPSTAT) {
{ //------------- Set up Received -------------//
//------------- Set up Received -------------// // 23.10.10.2 Operational model for setup transfers
// 23.10.10.2 Operational model for setup transfers lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;// acknowledge
lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;// acknowledge
dcd_event_setup_received(rhport, (uint8_t*) &p_dcd->qhd[0].setup_request, true);
dcd_event_setup_received(rhport, (uint8_t*) &p_dcd->qhd[0].setup_request, true); }
}
if ( edpt_complete )
if ( edpt_complete ) {
{ for(uint8_t ep_idx = 0; ep_idx < DCD_QHD_MAX; ep_idx++)
for(uint8_t ep_idx = 0; ep_idx < DCD_QHD_MAX; ep_idx++) {
{ if ( BIT_TEST_(edpt_complete, ep_idx2bit(ep_idx)) )
if ( BIT_TEST_(edpt_complete, ep_idx2bit(ep_idx)) ) {
{ // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set
// 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx]; dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx];
dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx];
uint8_t result = p_qtd->halted ? XFER_RESULT_STALLED :
uint8_t result = p_qtd->halted ? XFER_RESULT_STALLED : ( p_qtd->xact_err ||p_qtd->buffer_err ) ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS;
( p_qtd->xact_err ||p_qtd->buffer_err ) ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS;
uint8_t const ep_addr = (ep_idx/2) | ( (ep_idx & 0x01) ? TUSB_DIR_IN_MASK : 0 );
uint8_t const ep_addr = (ep_idx/2) | ( (ep_idx & 0x01) ? TUSB_DIR_IN_MASK : 0 ); dcd_event_xfer_complete(rhport, ep_addr, p_qtd->expected_bytes - p_qtd->total_bytes, result, true); // only number of bytes in the IOC qtd
dcd_event_xfer_complete(rhport, ep_addr, p_qtd->expected_bytes - p_qtd->total_bytes, result, true); // only number of bytes in the IOC qtd }
} }
} }
} }
}
if (int_status & INT_MASK_SOF)
if (int_status & INT_MASK_SOF) {
{ dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); }
}
if (int_status & INT_MASK_NAK) {}
if (int_status & INT_MASK_NAK) {} if (int_status & INT_MASK_ERROR) TU_ASSERT(false, );
if (int_status & INT_MASK_ERROR) TU_ASSERT(false, ); }
}
#endif
#endif
src/portable/nxp/lpc43xx_lpc18xx/dcd_lpc43xx.h → src/portable/nxp/lpc18_43/dcd_lpc18_43.h
+160 -160
View File
@@ -1,160 +1,160 @@
/**************************************************************************/ /**************************************************************************/
/*! /*!
@file dcd_lpc43xx.h @file dcd_lpc43xx.h
@author hathach (tinyusb.org) @author hathach (tinyusb.org)
@section LICENSE @section LICENSE
Software License Agreement (BSD License) Software License Agreement (BSD License)
Copyright (c) 2013, hathach (tinyusb.org) Copyright (c) 2013, hathach (tinyusb.org)
All rights reserved. All rights reserved.
Redistribution and use in source and binary forms, with or without Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met: modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright 1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer. notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright 2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution. documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holders nor the 3. Neither the name of the copyright holders nor the
names of its contributors may be used to endorse or promote products names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission. derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
This file is part of the tinyusb stack. This file is part of the tinyusb stack.
*/ */
/**************************************************************************/ /**************************************************************************/
/** \ingroup group_dcd /** \ingroup group_dcd
* \defgroup group_dcd_lpc143xx LPC43xx * \defgroup group_dcd_lpc143xx LPC43xx
* @{ */ * @{ */
#ifndef _TUSB_DCD_LPC43XX_H_ #ifndef _TUSB_DCD_LPC43XX_H_
#define _TUSB_DCD_LPC43XX_H_ #define _TUSB_DCD_LPC43XX_H_
#include "common/tusb_common.h" #include "common/tusb_common.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF // MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
#define DCD_QHD_MAX 12 #define DCD_QHD_MAX 12
#define DCD_QTD_MAX 12 #define DCD_QTD_MAX 12
#define QTD_NEXT_INVALID 0x01 #define QTD_NEXT_INVALID 0x01
/*---------- ENDPTCTRL ----------*/ /*---------- ENDPTCTRL ----------*/
enum { enum {
ENDPTCTRL_MASK_STALL = BIT_(0), ENDPTCTRL_MASK_STALL = BIT_(0),
ENDPTCTRL_MASK_TOGGLE_INHIBIT = BIT_(5), ///< used for test only ENDPTCTRL_MASK_TOGGLE_INHIBIT = BIT_(5), ///< used for test only
ENDPTCTRL_MASK_TOGGLE_RESET = BIT_(6), ENDPTCTRL_MASK_TOGGLE_RESET = BIT_(6),
ENDPTCTRL_MASK_ENABLE = BIT_(7) ENDPTCTRL_MASK_ENABLE = BIT_(7)
}; };
/*---------- USBCMD ----------*/ /*---------- USBCMD ----------*/
enum { enum {
USBCMD_MASK_RUN_STOP = BIT_(0), USBCMD_MASK_RUN_STOP = BIT_(0),
USBCMD_MASK_RESET = BIT_(1), USBCMD_MASK_RESET = BIT_(1),
USBCMD_MASK_SETUP_TRIPWIRE = BIT_(13), USBCMD_MASK_SETUP_TRIPWIRE = BIT_(13),
USBCMD_MASK_ADD_QTD_TRIPWIRE = BIT_(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD USBCMD_MASK_ADD_QTD_TRIPWIRE = BIT_(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD
}; };
// Interrupt Threshold bit 23:16 // Interrupt Threshold bit 23:16
/*---------- USBSTS, USBINTR ----------*/ /*---------- USBSTS, USBINTR ----------*/
enum { enum {
INT_MASK_USB = BIT_(0), INT_MASK_USB = BIT_(0),
INT_MASK_ERROR = BIT_(1), INT_MASK_ERROR = BIT_(1),
INT_MASK_PORT_CHANGE = BIT_(2), INT_MASK_PORT_CHANGE = BIT_(2),
INT_MASK_RESET = BIT_(6), INT_MASK_RESET = BIT_(6),
INT_MASK_SOF = BIT_(7), INT_MASK_SOF = BIT_(7),
INT_MASK_SUSPEND = BIT_(8), INT_MASK_SUSPEND = BIT_(8),
INT_MASK_NAK = BIT_(16) INT_MASK_NAK = BIT_(16)
}; };
//------------- PORTSC -------------// //------------- PORTSC -------------//
enum { enum {
PORTSC_CURRENT_CONNECT_STATUS_MASK = BIT_(0), PORTSC_CURRENT_CONNECT_STATUS_MASK = BIT_(0),
PORTSC_FORCE_PORT_RESUME_MASK = BIT_(6), PORTSC_FORCE_PORT_RESUME_MASK = BIT_(6),
PORTSC_SUSPEND_MASK = BIT_(7) PORTSC_SUSPEND_MASK = BIT_(7)
}; };
typedef struct typedef struct
{ {
// Word 0: Next QTD Pointer // Word 0: Next QTD Pointer
uint32_t next; ///< Next link pointer This field contains the physical memory address of the next dTD to be processed uint32_t next; ///< Next link pointer This field contains the physical memory address of the next dTD to be processed
// Word 1: qTQ Token // Word 1: qTQ Token
uint32_t : 3 ; uint32_t : 3 ;
volatile uint32_t xact_err : 1 ; volatile uint32_t xact_err : 1 ;
uint32_t : 1 ; uint32_t : 1 ;
volatile uint32_t buffer_err : 1 ; volatile uint32_t buffer_err : 1 ;
volatile uint32_t halted : 1 ; volatile uint32_t halted : 1 ;
volatile uint32_t active : 1 ; volatile uint32_t active : 1 ;
uint32_t : 2 ; uint32_t : 2 ;
uint32_t iso_mult_override : 2 ; ///< This field can be used for transmit ISOs to override the MULT field in the dQH. This field must be zero for all packet types that are not transmit-ISO. uint32_t iso_mult_override : 2 ; ///< This field can be used for transmit ISOs to override the MULT field in the dQH. This field must be zero for all packet types that are not transmit-ISO.
uint32_t : 3 ; uint32_t : 3 ;
uint32_t int_on_complete : 1 ; uint32_t int_on_complete : 1 ;
volatile uint32_t total_bytes : 15 ; volatile uint32_t total_bytes : 15 ;
uint32_t : 0 ; uint32_t : 0 ;
// Word 2-6: Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page // Word 2-6: Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page
uint32_t buffer[5]; ///< buffer1 has frame_n for TODO Isochronous uint32_t buffer[5]; ///< buffer1 has frame_n for TODO Isochronous
//------------- DCD Area -------------// //------------- DCD Area -------------//
uint16_t expected_bytes; uint16_t expected_bytes;
uint8_t reserved[2]; uint8_t reserved[2];
} dcd_qtd_t; } dcd_qtd_t;
TU_VERIFY_STATIC( sizeof(dcd_qtd_t) == 32, "size is not correct"); TU_VERIFY_STATIC( sizeof(dcd_qtd_t) == 32, "size is not correct");
typedef struct typedef struct
{ {
// Word 0: Capabilities and Characteristics // Word 0: Capabilities and Characteristics
uint32_t : 15 ; ///< Number of packets executed per transaction descriptor 00 - Execute N transactions as demonstrated by the USB variable length protocol where N is computed using Max_packet_length and the Total_bytes field in the dTD. 01 - Execute one transaction 10 - Execute two transactions 11 - Execute three transactions Remark: Non-isochronous endpoints must set MULT = 00. Remark: Isochronous endpoints must set MULT = 01, 10, or 11 as needed. uint32_t : 15 ; ///< Number of packets executed per transaction descriptor 00 - Execute N transactions as demonstrated by the USB variable length protocol where N is computed using Max_packet_length and the Total_bytes field in the dTD. 01 - Execute one transaction 10 - Execute two transactions 11 - Execute three transactions Remark: Non-isochronous endpoints must set MULT = 00. Remark: Isochronous endpoints must set MULT = 01, 10, or 11 as needed.
uint32_t int_on_setup : 1 ; ///< Interrupt on setup This bit is used on control type endpoints to indicate if USBINT is set in response to a setup being received. uint32_t int_on_setup : 1 ; ///< Interrupt on setup This bit is used on control type endpoints to indicate if USBINT is set in response to a setup being received.
uint32_t max_package_size : 11 ; ///< This directly corresponds to the maximum packet size of the associated endpoint (wMaxPacketSize) uint32_t max_package_size : 11 ; ///< This directly corresponds to the maximum packet size of the associated endpoint (wMaxPacketSize)
uint32_t : 2 ; uint32_t : 2 ;
uint32_t zero_length_termination : 1 ; ///< This bit is used for non-isochronous endpoints to indicate when a zero-length packet is received to terminate transfers in case the total transfer length is “multiple”. 0 - Enable zero-length packet to terminate transfers equal to a multiple of Max_packet_length (default). 1 - Disable zero-length packet on transfers that are equal in length to a multiple Max_packet_length. uint32_t zero_length_termination : 1 ; ///< This bit is used for non-isochronous endpoints to indicate when a zero-length packet is received to terminate transfers in case the total transfer length is “multiple”. 0 - Enable zero-length packet to terminate transfers equal to a multiple of Max_packet_length (default). 1 - Disable zero-length packet on transfers that are equal in length to a multiple Max_packet_length.
uint32_t iso_mult : 2 ; ///< uint32_t iso_mult : 2 ; ///<
uint32_t : 0 ; uint32_t : 0 ;
// Word 1: Current qTD Pointer // Word 1: Current qTD Pointer
volatile uint32_t qtd_addr; volatile uint32_t qtd_addr;
// Word 2-9: Transfer Overlay // Word 2-9: Transfer Overlay
volatile dcd_qtd_t qtd_overlay; volatile dcd_qtd_t qtd_overlay;
// Word 10-11: Setup request (control OUT only) // Word 10-11: Setup request (control OUT only)
volatile tusb_control_request_t setup_request; volatile tusb_control_request_t setup_request;
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
/// Due to the fact QHD is 64 bytes aligned but occupies only 48 bytes /// Due to the fact QHD is 64 bytes aligned but occupies only 48 bytes
/// thus there are 16 bytes padding free that we can make use of. /// thus there are 16 bytes padding free that we can make use of.
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
uint8_t reserved[16]; uint8_t reserved[16];
} dcd_qhd_t; } dcd_qhd_t;
TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct"); TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct");
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* _TUSB_DCD_LPC43XX_H_ */ #endif /* _TUSB_DCD_LPC43XX_H_ */
/** @} */ /** @} */
src/portable/nxp/lpc43xx_lpc18xx/hal_lpc43xx.c → src/portable/nxp/lpc18_43/hal_lpc18_43.c
+154 -154
View File
@@ -1,154 +1,154 @@
/**************************************************************************/ /**************************************************************************/
/*! /*!
@file hal_lpc43xx.c @file hal_lpc43xx.c
@author hathach (tinyusb.org) @author hathach (tinyusb.org)
@section LICENSE @section LICENSE
Software License Agreement (BSD License) Software License Agreement (BSD License)
Copyright (c) 2013, hathach (tinyusb.org) Copyright (c) 2013, hathach (tinyusb.org)
All rights reserved. All rights reserved.
Redistribution and use in source and binary forms, with or without Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met: modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright 1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer. notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright 2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution. documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holders nor the 3. Neither the name of the copyright holders nor the
names of its contributors may be used to endorse or promote products names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission. derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
This file is part of the tinyusb stack. This file is part of the tinyusb stack.
*/ */
/**************************************************************************/ /**************************************************************************/
#include "tusb.h" #include "tusb.h"
#if CFG_TUSB_MCU == OPT_MCU_LPC43XX #if CFG_TUSB_MCU == OPT_MCU_LPC43XX
#include "chip.h" #include "chip.h"
enum { enum {
LPC43XX_USBMODE_DEVICE = 2, LPC43XX_USBMODE_DEVICE = 2,
LPC43XX_USBMODE_HOST = 3 LPC43XX_USBMODE_HOST = 3
}; };
enum { enum {
LPC43XX_USBMODE_VBUS_LOW = 0, LPC43XX_USBMODE_VBUS_LOW = 0,
LPC43XX_USBMODE_VBUS_HIGH = 1 LPC43XX_USBMODE_VBUS_HIGH = 1
}; };
void tusb_hal_int_enable(uint8_t rhport) void tusb_hal_int_enable(uint8_t rhport)
{ {
NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
} }
void tusb_hal_int_disable(uint8_t rhport) void tusb_hal_int_disable(uint8_t rhport)
{ {
NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
} }
static void hal_controller_reset(uint8_t rhport) static void hal_controller_reset(uint8_t rhport)
{ // TODO timeout expired to prevent trap { // TODO timeout expired to prevent trap
volatile uint32_t * p_reg_usbcmd; volatile uint32_t * p_reg_usbcmd;
p_reg_usbcmd = (rhport ? &LPC_USB1->USBCMD_D : &LPC_USB0->USBCMD_D); p_reg_usbcmd = (rhport ? &LPC_USB1->USBCMD_D : &LPC_USB0->USBCMD_D);
// NXP chip powered with non-host mode --> sts bit is not correctly reflected // NXP chip powered with non-host mode --> sts bit is not correctly reflected
(*p_reg_usbcmd) |= BIT_(1); (*p_reg_usbcmd) |= BIT_(1);
// tu_timeout_t timeout; // tu_timeout_t timeout;
// tu_timeout_set(&timeout, 2); // should not take longer the time to stop controller // tu_timeout_set(&timeout, 2); // should not take longer the time to stop controller
while( ((*p_reg_usbcmd) & BIT_(1)) /*&& !tu_timeout_expired(&timeout)*/) {} while( ((*p_reg_usbcmd) & BIT_(1)) /*&& !tu_timeout_expired(&timeout)*/) {}
// //
// return tu_timeout_expired(&timeout) ? TUSB_ERROR_OSAL_TIMEOUT : TUSB_ERROR_NONE; // return tu_timeout_expired(&timeout) ? TUSB_ERROR_OSAL_TIMEOUT : TUSB_ERROR_NONE;
} }
bool tusb_hal_init(void) bool tusb_hal_init(void)
{ {
// USB0 // USB0
#if CFG_TUSB_RHPORT0_MODE #if CFG_TUSB_RHPORT0_MODE
Chip_USB0_Init(); Chip_USB0_Init();
// reset controller & set role // reset controller & set role
hal_controller_reset(0); hal_controller_reset(0);
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5); LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG #else // TODO OTG
LPC_USB0->USBMODE_D = LPC43XX_USBMODE_DEVICE; LPC_USB0->USBMODE_D = LPC43XX_USBMODE_DEVICE;
LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/;
#if CFG_TUD_FULLSPEED // TODO for easy testing #if CFG_TUD_FULLSPEED // TODO for easy testing
LPC_USB0->PORTSC1_D |= (1<<24); // force full speed LPC_USB0->PORTSC1_D |= (1<<24); // force full speed
#endif #endif
#endif #endif
#endif #endif
// USB1 // USB1
#if CFG_TUSB_RHPORT1_MODE #if CFG_TUSB_RHPORT1_MODE
Chip_USB1_Init(); Chip_USB1_Init();
hal_controller_reset(1); hal_controller_reset(1);
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST
LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5); LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG #else // TODO OTG
LPC_USB1->USBMODE_D = LPC43XX_USBMODE_DEVICE; LPC_USB1->USBMODE_D = LPC43XX_USBMODE_DEVICE;
#endif #endif
LPC_USB1->PORTSC1_D |= (1<<24); // TODO abstract, force rhport to fullspeed LPC_USB1->PORTSC1_D |= (1<<24); // TODO abstract, force rhport to fullspeed
#endif #endif
return true; return true;
} }
void hal_dcd_isr(uint8_t rhport); void hal_dcd_isr(uint8_t rhport);
#if CFG_TUSB_RHPORT0_MODE #if CFG_TUSB_RHPORT0_MODE
void USB0_IRQHandler(void) void USB0_IRQHandler(void)
{ {
#if MODE_HOST_SUPPORTED #if MODE_HOST_SUPPORTED
hal_hcd_isr(0); hal_hcd_isr(0);
#endif #endif
#if TUSB_OPT_DEVICE_ENABLED #if TUSB_OPT_DEVICE_ENABLED
hal_dcd_isr(0); hal_dcd_isr(0);
#endif #endif
} }
#endif #endif
#if CFG_TUSB_RHPORT1_MODE #if CFG_TUSB_RHPORT1_MODE
void USB1_IRQHandler(void) void USB1_IRQHandler(void)
{ {
#if MODE_HOST_SUPPORTED #if MODE_HOST_SUPPORTED
hal_hcd_isr(1); hal_hcd_isr(1);
#endif #endif
#if TUSB_OPT_DEVICE_ENABLED #if TUSB_OPT_DEVICE_ENABLED
hal_dcd_isr(1); hal_dcd_isr(1);
#endif #endif
} }
#endif #endif
void check_failed(uint8_t *file, uint32_t line) void check_failed(uint8_t *file, uint32_t line)
{ {
(void) file; (void) file;
(void) line; (void) line;
} }
#endif #endif