add code for ehci interrupt handler
- interrupt source identifying - for async list process refractor control_xfer to use insert_qtd_to_qhd - add test for control xfer interrupt processing - add code for faking ehci controller async list scheduling & processing - add prototype for void usbh_isr(pipe_handle_t pipe_hdl, uint8_t class_code);
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@@ -43,7 +43,7 @@
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#include "hal.h"
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#include "mock_osal.h"
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#include "hcd.h"
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#include "usbh_hcd.h"
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#include "mock_usbh_hcd.h"
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#include "ehci.h"
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extern ehci_data_t ehci_data;
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@@ -43,7 +43,7 @@
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#include "hal.h"
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#include "mock_osal.h"
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#include "hcd.h"
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#include "usbh_hcd.h"
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#include "mock_usbh_hcd.h"
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#include "ehci.h"
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#include "test_ehci.h"
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@@ -43,7 +43,7 @@
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#include "hal.h"
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#include "mock_osal.h"
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#include "hcd.h"
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#include "usbh_hcd.h"
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#include "mock_usbh_hcd.h"
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#include "ehci.h"
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#include "test_ehci.h"
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@@ -178,3 +178,8 @@ void test_bulk_xfer_double(void)
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//------------- list tail -------------//
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}
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//void test_bulk_xfer_isr(void)
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//{
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//
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//}
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@@ -43,9 +43,10 @@
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#include "hal.h"
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#include "mock_osal.h"
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#include "hcd.h"
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#include "usbh_hcd.h"
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#include "mock_usbh_hcd.h"
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#include "ehci.h"
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#include "test_ehci.h"
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#include "ehci_controller.h"
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extern ehci_data_t ehci_data;
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usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1];
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@@ -199,6 +200,9 @@ void test_control_xfer_get(void)
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TEST_ASSERT_TRUE(p_status->data_toggle);
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TEST_ASSERT_EQUAL(EHCI_PID_OUT, p_status->pid);
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TEST_ASSERT_TRUE(p_status->next.terminate);
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TEST_ASSERT_EQUAL_HEX(p_setup, p_qhd->p_qtd_list_head);
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TEST_ASSERT_EQUAL_HEX(p_status, p_qhd->p_qtd_list_tail);
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}
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void test_control_xfer_set(void)
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@@ -227,4 +231,32 @@ void test_control_xfer_set(void)
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TEST_ASSERT_TRUE(p_status->data_toggle);
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TEST_ASSERT_EQUAL(EHCI_PID_IN, p_status->pid);
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TEST_ASSERT_TRUE(p_status->next.terminate);
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TEST_ASSERT_EQUAL_HEX(p_setup, p_qhd->p_qtd_list_head);
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TEST_ASSERT_EQUAL_HEX(p_status, p_qhd->p_qtd_list_tail);
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}
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void test_control_xfer_isr(void)
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{
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ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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ehci_controller_run(hostid);
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TEST_ASSERT_EQUAL_HEX(async_head, get_operational_register(hostid)->async_list_base);
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TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
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usbh_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0);
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//------------- Code Under TEST -------------//
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printf("control head = %x\n", p_qhd);
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hcd_isr(hostid);
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TEST_ASSERT_NULL(p_qhd->p_qtd_list_head);
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TEST_ASSERT_NULL(p_qhd->p_qtd_list_tail);
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TEST_ASSERT_FALSE(p_setup->used);
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TEST_ASSERT_FALSE(p_data->used);
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TEST_ASSERT_FALSE(p_status->used);
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}
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@@ -43,7 +43,7 @@
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#include "hal.h"
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#include "mock_osal.h"
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#include "hcd.h"
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#include "usbh_hcd.h"
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#include "mock_usbh_hcd.h"
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#include "ehci.h"
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extern ehci_data_t ehci_data;
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