refactor dcd API, drop edpt_hdl_t in favor of endpoint address for easy port
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@@ -55,10 +55,8 @@ TUSB_CFG_ATTR_USBRAM STATIC_VAR cdc_line_coding_t cdcd_line_coding[CONTROLLER_DE
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typedef struct {
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uint8_t interface_number;
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cdc_acm_capability_t acm_capability;
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bool connected;
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edpt_hdl_t edpt_hdl[3]; // notification, data in, data out
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uint8_t edpt_addr[3]; // notification, data in, data out
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}cdcd_data_t;
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// TODO multiple port
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@@ -157,7 +155,9 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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if ( TUSB_DESC_TYPE_ENDPOINT == p_desc[DESCRIPTOR_OFFSET_TYPE])
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{ // notification endpoint if any
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VERIFY( tusb_dcd_edpt_open(port, (tusb_descriptor_endpoint_t const *) p_desc, &p_cdc->edpt_hdl[CDC_PIPE_NOTIFICATION]), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
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TU_ASSERT( tusb_dcd_edpt_open(port, (tusb_descriptor_endpoint_t const *) p_desc), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
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p_cdc->edpt_addr[CDC_PIPE_NOTIFICATION] = ((tusb_descriptor_endpoint_t const *) p_desc)->bEndpointAddress;
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(*p_length) += p_desc[DESCRIPTOR_OFFSET_LENGTH];
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p_desc = descriptor_next(p_desc);
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@@ -174,13 +174,18 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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for(uint32_t i=0; i<2; i++)
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{
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tusb_descriptor_endpoint_t const *p_endpoint = (tusb_descriptor_endpoint_t const *) p_desc;
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ASSERT_(TUSB_DESC_TYPE_ENDPOINT == p_endpoint->bDescriptorType, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
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ASSERT_(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
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TU_ASSERT(TUSB_DESC_TYPE_ENDPOINT == p_endpoint->bDescriptorType, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
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TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
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edpt_hdl_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
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&p_cdc->edpt_hdl[CDC_PIPE_DATA_IN] : &p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT] ;
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TU_ASSERT( tusb_dcd_edpt_open(port, p_endpoint), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
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ASSERT_( tusb_dcd_edpt_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
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if ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK )
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{
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p_cdc->edpt_addr[CDC_PIPE_DATA_IN] = p_endpoint->bEndpointAddress;
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}else
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{
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p_cdc->edpt_addr[CDC_PIPE_DATA_OUT] = p_endpoint->bEndpointAddress;
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}
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(*p_length) += p_desc[DESCRIPTOR_OFFSET_LENGTH];
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p_desc = descriptor_next( p_desc );
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@@ -190,7 +195,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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p_cdc->interface_number = p_interface_desc->bInterfaceNumber;
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// Prepare for incoming data
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tusb_dcd_edpt_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
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tusb_dcd_edpt_xfer(port, p_cdc->edpt_addr[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
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return TUSB_ERROR_NONE;
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@@ -255,19 +260,19 @@ tusb_error_t cdcd_control_request_subtask(uint8_t port, tusb_control_request_t c
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return TUSB_ERROR_NONE;
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}
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tusb_error_t cdcd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
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tusb_error_t cdcd_xfer_cb(uint8_t port, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes)
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{
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cdcd_data_t const * p_cdc = &cdcd_data[edpt_hdl.port];
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cdcd_data_t const * p_cdc = &cdcd_data[port];
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if ( edpt_equal(edpt_hdl, p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT]) )
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if ( edpt_addr == p_cdc->edpt_addr[CDC_PIPE_DATA_OUT] )
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{
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fifo_write_n(&_rx_ff, _tmp_rx_buf, xferred_bytes);
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// preparing for next
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tusb_dcd_edpt_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
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tusb_dcd_edpt_xfer(port, p_cdc->edpt_addr[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
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// fire callback
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tud_cdc_rx_cb(edpt_hdl.port);
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tud_cdc_rx_cb(port);
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}
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return TUSB_ERROR_NONE;
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@@ -277,13 +282,13 @@ void cdcd_sof(uint8_t port)
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{
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if ( !tud_cdc_connected(port) ) return;
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edpt_hdl_t ep = cdcd_data[port].edpt_hdl[CDC_PIPE_DATA_IN];
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uint8_t edpt = cdcd_data[port].edpt_addr[CDC_PIPE_DATA_IN];
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if ( !tusb_dcd_edpt_busy( ep ) )
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if ( !tusb_dcd_edpt_busy(port, edpt) )
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{
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uint16_t count = fifo_read_n(&_tx_ff, _tmp_tx_buf, sizeof(_tmp_tx_buf));
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tusb_dcd_edpt_xfer(ep, _tmp_tx_buf, count, false);
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tusb_dcd_edpt_xfer(port, edpt, _tmp_tx_buf, count, false);
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}
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}
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@@ -79,7 +79,7 @@ void tud_cdc_rx_cb(uint8_t port);
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void cdcd_init(void);
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tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
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tusb_error_t cdcd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request);
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tusb_error_t cdcd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
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tusb_error_t cdcd_xfer_cb(uint8_t port, uint8_t edpt_addr, tusb_event_t event, uint32_t xferred_bytes);
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void cdcd_close(uint8_t port);
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void cdcd_sof(uint8_t port);
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@@ -155,7 +155,7 @@
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#define ASSERT_1ARGS(cond) do { if (!(cond)) { tusb_hal_dbg_breakpoint(); _ASSERT_MESS() return false; } } while(0)
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#define ASSERT_2ARGS(cond, _error) do { if (!(cond)) { tusb_hal_dbg_breakpoint(); _ASSERT_MESS() return _error;} } while(0)
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#define ASSERT_(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS)(__VA_ARGS__)
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#define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS)(__VA_ARGS__)
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#ifdef __cplusplus
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}
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@@ -138,7 +138,7 @@ typedef struct ATTR_ALIGNED(4)
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tusb_control_request_t setup_received;
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struct { // USBD_EVENTID_XFER_DONE
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edpt_hdl_t edpt_hdl;
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uint8_t edpt_addr;
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uint32_t xferred_byte;
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}xfer_done;
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};
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@@ -252,7 +252,7 @@ static tusb_error_t usbd_body_subtask(void)
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{
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if ( usbd_class_drivers[class_code].xfer_cb )
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{
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usbd_class_drivers[class_code].xfer_cb( event.xfer_done.edpt_hdl, (tusb_event_t) event.sub_event_id, event.xfer_done.xferred_byte);
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usbd_class_drivers[class_code].xfer_cb( event.port, event.xfer_done.edpt_addr, (tusb_event_t) event.sub_event_id, event.xfer_done.xferred_byte);
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}
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}
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}else if (USBD_EVENTID_SOF == event.event_id)
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@@ -498,9 +498,9 @@ void tusb_dcd_setup_received(uint8_t port, uint8_t const* p_request)
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osal_queue_send(usbd_queue_hdl, &task_event);
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}
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void tusb_dcd_xfer_complete(edpt_hdl_t edpt_hdl, uint32_t xferred_bytes, bool succeeded)
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void tusb_dcd_xfer_complete(uint8_t port, uint8_t edpt_addr, uint32_t xferred_bytes, bool succeeded)
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{
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if (edpt_hdl.index == 0 )
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if (edpt_addr == 0 )
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{
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// Control Transfer
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osal_semaphore_post( usbd_control_xfer_sem_hdl );
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@@ -508,13 +508,13 @@ void tusb_dcd_xfer_complete(edpt_hdl_t edpt_hdl, uint32_t xferred_bytes, bool su
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{
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usbd_task_event_t task_event =
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{
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.port = edpt_hdl.port,
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.port = port,
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.event_id = USBD_EVENTID_XFER_DONE,
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.sub_event_id = succeeded ? TUSB_EVENT_XFER_COMPLETE : TUSB_EVENT_XFER_ERROR
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};
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task_event.xfer_done.edpt_addr = edpt_addr;
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task_event.xfer_done.xferred_byte = xferred_bytes;
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task_event.xfer_done.edpt_hdl = edpt_hdl;
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osal_queue_send(usbd_queue_hdl, &task_event);
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}
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@@ -78,9 +78,9 @@ extern tusbd_descriptor_pointer_t tusbd_descriptor_pointers;
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typedef struct {
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void (* init) (void);
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tusb_error_t (* open)(uint8_t, tusb_descriptor_interface_t const *, uint16_t*);
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tusb_error_t (* open)(uint8_t port, tusb_descriptor_interface_t const * desc_intf, uint16_t* p_length);
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tusb_error_t (* control_request_subtask) (uint8_t port, tusb_control_request_t const *);
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tusb_error_t (* xfer_cb) (edpt_hdl_t, tusb_event_t, uint32_t);
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tusb_error_t (* xfer_cb) (uint8_t port, uint8_t edpt_addr, tusb_event_t, uint32_t);
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// void (* routine)(void);
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void (* sof)(uint8_t port);
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void (* close) (uint8_t);
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+6
-15
@@ -58,15 +58,6 @@ typedef enum
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USBD_BUS_EVENT_RESUME
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}usbd_bus_event_type_t;
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typedef struct {
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uint8_t port;
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uint8_t index; // must be zero to indicate control
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} edpt_hdl_t;
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static inline bool edpt_equal(edpt_hdl_t x, edpt_hdl_t y)
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{
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return (x.port == y.port) && (x.index == y.index);
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}
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//------------- Controller API -------------//
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bool tusb_dcd_init (uint8_t port);
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@@ -81,7 +72,7 @@ void tusb_dcd_set_config (uint8_t port, uint8_t config_num);
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*------------------------------------------------------------------*/
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void tusb_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event);
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void tusb_dcd_setup_received(uint8_t port, uint8_t const* p_request);
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void tusb_dcd_xfer_complete(edpt_hdl_t edpt_hdl, uint32_t xferred_bytes, bool succeeded);
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void tusb_dcd_xfer_complete(uint8_t port, uint8_t edpt_addr, uint32_t xferred_bytes, bool succeeded);
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/*------------------------------------------------------------------*/
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/* API
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@@ -90,14 +81,14 @@ void tusb_dcd_xfer_complete(edpt_hdl_t edpt_hdl, uint32_t xferred_bytes, bool su
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bool tusb_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete);
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void tusb_dcd_control_stall(uint8_t port);
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bool tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh);
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tusb_error_t tusb_dcd_edpt_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
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tusb_error_t tusb_dcd_edpt_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
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bool tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc);
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tusb_error_t tusb_dcd_edpt_queue_xfer(uint8_t port, uint8_t edpt_addr, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
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tusb_error_t tusb_dcd_edpt_xfer(uint8_t port, uint8_t edpt_addr, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
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bool tusb_dcd_edpt_busy(edpt_hdl_t edpt_hdl);
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bool tusb_dcd_edpt_busy(uint8_t port, uint8_t edpt_addr);
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// TODO port + endpoint address are part of endpoint handle, not endpoint handle, data toggle also need to be reset
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void tusb_dcd_edpt_stall(edpt_hdl_t edpt_hdl);
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void tusb_dcd_edpt_stall(uint8_t port, uint8_t edpt_addr);
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void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t edpt_addr);
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#ifdef __cplusplus
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