able to fully enumerated with keyboard
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@@ -89,6 +89,7 @@ tusb_error_t dcd_pipe_control_xfer(uint8_t coreid, tusb_direction_t dir, void *
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//void dcd_pipe_control_write_zero_length(uint8_t coreid);
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endpoint_handle_t dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc) ATTR_WARN_UNUSED_RESULT;
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tusb_error_t dcd_pipe_xfer(endpoint_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT;
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#ifdef __cplusplus
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}
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@@ -195,32 +195,37 @@ void dcd_controller_set_configuration(uint8_t coreid, uint8_t config_num)
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}
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/// follows LPC43xx User Manual 23.10.3
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void bus_reset(uint8_t coreid)
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{
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// TODO mutliple core id support
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//------------- Clear All Registers -------------//
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LPC_USB0->ENDPTNAK = LPC_USB0->ENDPTNAK;
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LPC_USB0->ENDPTNAKEN = 0;
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LPC_USB0->USBSTS_D = LPC_USB0->USBSTS_D;
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LPC_USB0->ENDPTSETUPSTAT = LPC_USB0->ENDPTSETUPSTAT;
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LPC_USB0->ENDPTCOMPLETE = LPC_USB0->ENDPTCOMPLETE;
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while (LPC_USB0->ENDPTPRIME);
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LPC_USB0->ENDPTFLUSH = 0xFFFFFFFF;
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while (LPC_USB0->ENDPTFLUSH);
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// read reset bit in portsc
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//------------- Queue Head & Queue TD -------------//
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memclr_(&dcd_data, sizeof(dcd_data_t));
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//------------- Set up Control Endpoints (0 OUT, 1 IN) -------------//
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dcd_data.qhd[0].zero_length_termination = dcd_data.qhd[1].zero_length_termination = 1;
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dcd_data.qhd[0].max_package_size = dcd_data.qhd[1].max_package_size = CONTROL_ENDOINT_SIZE;
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dcd_data.qhd[0].qtd_overlay.next = dcd_data.qhd[1].qtd_overlay.next = QTD_INVALID;
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dcd_data.qhd[0].int_on_setup = 1; // OUT only
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}
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tusb_error_t dcd_init(void)
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{
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// TODO mutliple core id support
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/* disable all EPs */
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LPC_USB0->ENDPTCTRL1 &= ~(ENDPTCTRL_MASK_ENABLE | (ENDPTCTRL_MASK_ENABLE << 16) );
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LPC_USB0->ENDPTCTRL2 &= ~(ENDPTCTRL_MASK_ENABLE | (ENDPTCTRL_MASK_ENABLE << 16) );
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LPC_USB0->ENDPTCTRL3 &= ~(ENDPTCTRL_MASK_ENABLE | (ENDPTCTRL_MASK_ENABLE << 16) );
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LPC_USB0->ENDPTCTRL4 &= ~(ENDPTCTRL_MASK_ENABLE | (ENDPTCTRL_MASK_ENABLE << 16) );
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LPC_USB0->ENDPTCTRL5 &= ~(ENDPTCTRL_MASK_ENABLE | (ENDPTCTRL_MASK_ENABLE << 16) );
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/* Clear all pending interrupts */
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LPC_USB0->ENDPTNAK = LPC_USB0->ENDPTNAK;
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LPC_USB0->ENDPTNAKEN = 0;
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LPC_USB0->USBSTS_D = LPC_USB0->USBSTS_D;
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LPC_USB0->ENDPTSETUPSTAT = LPC_USB0->ENDPTSETUPSTAT;
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LPC_USB0->ENDPTCOMPLETE = LPC_USB0->ENDPTCOMPLETE;
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// while (LPC_USB0->ENDPTPRIME); /* Wait until all bits are 0 */
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LPC_USB0->ENDPTFLUSH = 0xFFFFFFFF;
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while (LPC_USB0->ENDPTFLUSH); /* Wait until all bits are 0 */
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/* Set the interrupt Threshold control interval to 0 */
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LPC_USB0->USBCMD_D &= ~0x00FF0000;
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@@ -230,13 +235,6 @@ tusb_error_t dcd_init(void)
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/* Enable interrupts: USB interrupt, error, port change, reset, suspend, NAK interrupt */
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LPC_USB0->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND; // | INT_MASK_SOF| INT_MASK_NAK;
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//------------- Set up Control Endpoints (0 OUT, 1 IN)-------------//
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dcd_data.qhd[0].zero_length_termination = dcd_data.qhd[1].zero_length_termination = 1;
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dcd_data.qhd[0].max_package_size = dcd_data.qhd[1].max_package_size = CONTROL_ENDOINT_SIZE;
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dcd_data.qhd[0].qtd_overlay.next = dcd_data.qhd[1].qtd_overlay.next = QTD_INVALID;
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dcd_data.qhd[0].int_on_setup = 1; // OUT only
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return TUSB_ERROR_NONE;
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}
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@@ -328,7 +326,39 @@ endpoint_handle_t dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const
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return (endpoint_handle_t) { .coreid = coreid, .xfer_type = p_endpoint_desc->bmAttributes.xfer, .index = ep_idx };
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}
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STATIC_ INLINE_ dcd_qhd_t* qhd_get_from_endpoint_handle(endpoint_handle_t edpt_hdl) ATTR_PURE ATTR_ALWAYS_INLINE;
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STATIC_ INLINE_ dcd_qhd_t* qhd_get_from_endpoint_handle(endpoint_handle_t edpt_hdl)
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{
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return &dcd_data.qhd[edpt_hdl.index];
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}
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tusb_error_t dcd_pipe_xfer(endpoint_handle_t edpt_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
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{
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dcd_qhd_t* p_qhd = qhd_get_from_endpoint_handle(edpt_hdl);
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dcd_qtd_t* p_qtd = &dcd_data.qtd[edpt_hdl.index]; // TODO allocate qtd
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ASSERT(edpt_hdl.xfer_type != TUSB_XFER_ISOCHRONOUS, TUSB_ERROR_NOT_SUPPORTED_YET);
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// TODO pipe is busy
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// DeviceTransferDescriptor* pDTD = (DeviceTransferDescriptor*) &dTransferDescriptor[PhyEP];
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// while ( lpc_usb->ENDPTSTAT & _BIT( EP_Physical2BitPosition(PhyEP) ) ) /* Endpoint is already primed */
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// {
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// }
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//------------- Prepare qtd -------------//
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qtd_init(p_qtd, buffer, total_bytes);
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p_qtd->int_on_complete = int_on_complete;
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p_qhd->qtd_overlay.next = (uint32_t) p_qtd;
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#define EP_Physical2Pos(n) ( (n)/2 + ((n)%2 ? 16 : 0 ) )
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LPC_USB0->ENDPTPRIME |= BIT_( EP_Physical2Pos(edpt_hdl.index) ) ;
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return TUSB_ERROR_NONE;
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}
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//------------- Device Controller Driver's Interrupt Handler -------------//
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void dcd_isr(uint8_t coreid)
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{
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uint32_t int_status = LPC_USB0->USBSTS_D;
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@@ -340,15 +370,18 @@ void dcd_isr(uint8_t coreid)
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if (int_status & INT_MASK_RESET)
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{
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// dcd_init()
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bus_reset(coreid);
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usbd_bus_reset(coreid);
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}
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if (int_status & INT_MASK_USB)
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{
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if (LPC_USB0->ENDPTSETUPSTAT)
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{
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LPC_USB0->ENDPTSETUPSTAT = 1;
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usbd_setup_received_isr(coreid, &dcd_data.qhd[0].setup_request);
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tusb_control_request_t control_request = dcd_data.qhd[0].setup_request;
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LPC_USB0->ENDPTSETUPSTAT = LPC_USB0->ENDPTSETUPSTAT;
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usbd_setup_received_isr(coreid, &control_request);
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}
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if (LPC_USB0->ENDPTCOMPLETE)
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@@ -363,4 +396,8 @@ void dcd_isr(uint8_t coreid)
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if (int_status & INT_MASK_NAK) { }
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if (int_status & INT_MASK_ERROR) ASSERT(false, VOID_RETURN);
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}
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//--------------------------------------------------------------------+
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// HELPER
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//--------------------------------------------------------------------+
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#endif
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+21
-16
@@ -83,7 +83,7 @@ bool tusbd_is_configured(uint8_t coreid)
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//--------------------------------------------------------------------+
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void usbd_bus_reset(uint32_t coreid)
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{
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memclr_(usbd_devices, sizeof(usbd_device_info_t)*CONTROLLER_DEVICE_NUMBER);
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memclr_(&usbd_devices[coreid], sizeof(usbd_device_info_t));
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}
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void std_get_descriptor(uint8_t coreid, tusb_control_request_t * p_request)
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@@ -119,6 +119,25 @@ void std_get_descriptor(uint8_t coreid, tusb_control_request_t * p_request)
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}
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}
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tusb_error_t usbh_set_configure_received(uint8_t coreid, uint8_t config_number)
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{
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dcd_controller_set_configuration(coreid, config_number);
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usbd_devices[coreid].state = TUSB_DEVICE_STATE_CONFIGURED;
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uint16_t length = 0;
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#if TUSB_CFG_DEVICE_HID_KEYBOARD
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tusb_descriptor_interface_t const * p_interface = &app_tusb_desc_configuration.keyboard_interface;
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ASSERT_STATUS( hidd_init(0, p_interface, &length) );
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usbd_devices[0].interface2class[p_interface->bInterfaceNumber] = p_interface->bInterfaceClass;
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#endif
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#if TUSB_CFG_DEVICE_HID_MOUSE
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ASSERT_STATUS( hidd_init(0, &app_tusb_desc_configuration.mouse_interface, &length) );
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#endif
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}
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void usbd_setup_received_isr(uint8_t coreid, tusb_control_request_t * p_request)
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{
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usbd_device_info_t *p_device = &usbd_devices[coreid];
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@@ -141,9 +160,7 @@ void usbd_setup_received_isr(uint8_t coreid, tusb_control_request_t * p_request)
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break;
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case TUSB_REQUEST_SET_CONFIGURATION:
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dcd_controller_set_configuration(coreid, (uint8_t) p_request->wValue);
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usbd_devices[coreid].state = TUSB_DEVICE_STATE_CONFIGURED;
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usbh_set_configure_received(coreid, (uint8_t) p_request->wValue);
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dcd_pipe_control_xfer(coreid, TUSB_DIR_HOST_TO_DEV, NULL, 0); // zero length
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break;
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@@ -166,18 +183,6 @@ tusb_error_t usbd_init (void)
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ASSERT_STATUS ( dcd_init() );
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uint16_t length = 0;
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#if TUSB_CFG_DEVICE_HID_KEYBOARD
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tusb_descriptor_interface_t const * p_interface = &app_tusb_desc_configuration.keyboard_interface;
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ASSERT_STATUS( hidd_init(0, p_interface, &length) );
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usbd_devices[0].interface2class[p_interface->bInterfaceNumber] = p_interface->bInterfaceClass;
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#endif
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#if TUSB_CFG_DEVICE_HID_MOUSE
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ASSERT_STATUS( hidd_init(0, &app_tusb_desc_configuration.mouse_interface, &length) );
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#endif
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dcd_controller_connect(0); // TODO USB1
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return TUSB_ERROR_NONE;
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