mcb1800 and lpc18s37 work well with both device and host demo
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@@ -20,35 +20,35 @@ MEMORY
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RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
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}
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/* Define a symbol for the top of each memory region */
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__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */
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__base_Flash = 0x1a000000 ; /* Flash */
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__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
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__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
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__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */
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__base_Flash2 = 0x1b000000 ; /* Flash2 */
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__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
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__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
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__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
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__base_RAM = 0x10000000 ; /* RAM */
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__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
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__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
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__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */
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__base_RAM2 = 0x10080000 ; /* RAM2 */
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__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
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__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
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__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */
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__base_RAM3 = 0x20000000 ; /* RAM3 */
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__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
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__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
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__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */
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__base_RAM4 = 0x20008000 ; /* RAM4 */
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__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
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__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
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__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */
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__base_RAM5 = 0x2000c000 ; /* RAM5 */
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__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
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__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
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/* Define a symbol for the top of each memory region */
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__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */
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__base_Flash = 0x1a000000 ; /* Flash */
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__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
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__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
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__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */
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__base_Flash2 = 0x1b000000 ; /* Flash2 */
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__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
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__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
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__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
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__base_RAM = 0x10000000 ; /* RAM */
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__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
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__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
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__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */
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__base_RAM2 = 0x10080000 ; /* RAM2 */
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__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
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__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
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__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */
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__base_RAM3 = 0x20000000 ; /* RAM3 */
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__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
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__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
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__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */
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__base_RAM4 = 0x20008000 ; /* RAM4 */
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__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
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__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
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__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */
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__base_RAM5 = 0x2000c000 ; /* RAM5 */
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__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
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__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
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ENTRY(ResetISR)
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