fix warning with lpcopen

hw/mcu/nxp/lpc_chip_18xx/src/clock_18xx_43xx.c

@@ -194,6 +194,7 @@ static uint32_t Chip_Clock_TestMainPLLMultiplier(uint32_t InputHz, uint32_t Test
 /* Returns clock rate out of a divider */
 static uint32_t Chip_Clock_GetDivRate(CHIP_CGU_CLKIN_T clock, CHIP_CGU_IDIV_T divider)
 {
+  (void) clock;
 	CHIP_CGU_CLKIN_T input;
 	uint32_t div;
 

hw/mcu/nxp/lpc_chip_18xx/src/gpio_18xx_43xx.c

@@ -50,11 +50,13 @@
 /* Initialize GPIO block */
 void Chip_GPIO_Init(LPC_GPIO_T *pGPIO)
 {
+  (void) pGPIO;
 }
 
 /* De-Initialize GPIO block */
 void Chip_GPIO_DeInit(LPC_GPIO_T *pGPIO)
 {
+  (void) pGPIO;
 }
 
 

hw/mcu/nxp/lpc_chip_18xx/src/sysinit_18xx_43xx.c

@@ -133,7 +133,7 @@ void Chip_SetupCoreClock(CHIP_CGU_CLKIN_T clkin, uint32_t core_freq, bool setbas
 		/* Setup system base clocks and initial states. This won't enable and
 		   disable individual clocks, but sets up the base clock sources for
 		   each individual peripheral clock. */
-		for (i = 0; i < (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++) {
+		for (i = 0; i < (int) (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++) {
 			Chip_Clock_SetBaseClock(InitClkStates[i].clk, InitClkStates[i].clkin,
 									InitClkStates[i].autoblock_enab, InitClkStates[i].powerdn);
 		}

hw/mcu/nxp/lpc_chip_18xx/src/uart_18xx_43xx.c

@@ -132,6 +132,8 @@ void Chip_UART_Init(LPC_USART_T *pUART)
 
 	/* Disable fractional divider */
 	pUART->FDR = 0x10;
+
+  (void) tmp;
 }
 
 /* De-initializes the pUART peripheral */