move lpc_chip_13xx files
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hathach
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/*
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* @brief LPC13XX Pin Interrupt and Pattern Match Registers and driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __PININT_13XX_H_
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#define __PININT_13XX_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup PININT_13XX CHIP: LPC13xx Pin Interrupt and Pattern Match driver
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* @ingroup CHIP_13XX_Drivers
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* @{
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*/
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#if defined(CHIP_LPC1347)
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/**
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* @brief LPC13xx Pin Interrupt and Pattern Match register block structure
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*/
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typedef struct { /*!< PIN_INT Structure */
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__IO uint32_t ISEL; /*!< Pin Interrupt Mode register */
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__IO uint32_t IENR; /*!< Pin Interrupt Enable (Rising) register */
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__IO uint32_t SIENR; /*!< Set Pin Interrupt Enable (Rising) register */
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__IO uint32_t CIENR; /*!< Clear Pin Interrupt Enable (Rising) register */
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__IO uint32_t IENF; /*!< Pin Interrupt Enable Falling Edge / Active Level register */
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__IO uint32_t SIENF; /*!< Set Pin Interrupt Enable Falling Edge / Active Level register */
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__IO uint32_t CIENF; /*!< Clear Pin Interrupt Enable Falling Edge / Active Level address */
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__IO uint32_t RISE; /*!< Pin Interrupt Rising Edge register */
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__IO uint32_t FALL; /*!< Pin Interrupt Falling Edge register */
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__IO uint32_t IST; /*!< Pin Interrupt Status register */
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} LPC_PIN_INT_T;
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/**
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* LPC13xx Pin Interrupt channel values
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*/
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#define PININTCH0 (1 << 0)
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#define PININTCH1 (1 << 1)
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#define PININTCH2 (1 << 2)
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#define PININTCH3 (1 << 3)
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#define PININTCH4 (1 << 4)
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#define PININTCH5 (1 << 5)
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#define PININTCH6 (1 << 6)
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#define PININTCH7 (1 << 7)
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#define PININTCH(ch) (1 << (ch))
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/**
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* @brief Initialize Pin interrupt block
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* @param pPININT : The base address of Pin interrupt block
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* @return Nothing
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* @note This function should be used after the Chip_GPIO_Init() function.
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*/
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STATIC INLINE void Chip_PININT_Init(LPC_PIN_INT_T *pPININT) {}
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/**
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* @brief De-Initialize Pin interrupt block
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* @param pPININT : The base address of Pin interrupt block
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_DeInit(LPC_PIN_INT_T *pPININT) {}
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/**
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* @brief Configure the pins as edge sensitive in Pin interrupt block
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pins (ORed value of PININTCH*)
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_SetPinModeEdge(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->ISEL &= ~pins;
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}
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/**
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* @brief Configure the pins as level sensitive in Pin interrupt block
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pins (ORed value of PININTCH*)
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_SetPinModeLevel(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->ISEL |= pins;
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}
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/**
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* @brief Return current PININT rising edge or high level interrupt enable state
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* @param pPININT : The base address of Pin interrupt block
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* @return A bifield containing the high edge/level interrupt enables for each
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* interrupt. Bit 0 = PININT0, 1 = PININT1, etc.
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* For each bit, a 0 means the high edge/level interrupt is disabled, while a 1
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* means it's enabled.
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*/
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STATIC INLINE uint32_t Chip_PININT_GetHighEnabled(LPC_PIN_INT_T *pPININT)
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{
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return pPININT->IENR;
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}
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/**
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* @brief Enable high edge/level PININT interrupts for pins
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pins to enable (ORed value of PININTCH*)
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_EnableIntHigh(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->SIENR = pins;
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}
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/**
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* @brief Disable high edge/level PININT interrupts for pins
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pins to disable (ORed value of PININTCH*)
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_DisableIntHigh(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->CIENR = pins;
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}
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/**
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* @brief Return current PININT falling edge or low level interrupt enable state
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* @param pPININT : The base address of Pin interrupt block
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* @return A bifield containing the low edge/level interrupt enables for each
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* interrupt. Bit 0 = PININT0, 1 = PININT1, etc.
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* For each bit, a 0 means the low edge/level interrupt is disabled, while a 1
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* means it's enabled.
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*/
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STATIC INLINE uint32_t Chip_PININT_GetLowEnabled(LPC_PIN_INT_T *pPININT)
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{
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return pPININT->IENF;
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}
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/**
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* @brief Enable low edge/level PININT interrupts for pins
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pins to enable (ORed value of PININTCH*)
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_EnableIntLow(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->SIENF = pins;
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}
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/**
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* @brief Disable low edge/level PININT interrupts for pins
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pins to disable (ORed value of PININTCH*)
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_DisableIntLow(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->CIENF = pins;
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}
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/**
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* @brief Return pin states that have a detected latched high edge (RISE) state
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* @param pPININT : The base address of Pin interrupt block
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* @return PININT states (bit n = high) with a latched rise state detected
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*/
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STATIC INLINE uint32_t Chip_PININT_GetRiseStates(LPC_PIN_INT_T *pPININT)
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{
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return pPININT->RISE;
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}
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/**
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* @brief Clears pin states that had a latched high edge (RISE) state
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pins with latched states to clear
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_ClearRiseStates(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->RISE = pins;
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}
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/**
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* @brief Return pin states that have a detected latched falling edge (FALL) state
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* @param pPININT : The base address of Pin interrupt block
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* @return PININT states (bit n = high) with a latched rise state detected
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*/
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STATIC INLINE uint32_t Chip_PININT_GetFallStates(LPC_PIN_INT_T *pPININT)
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{
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return pPININT->FALL;
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}
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/**
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* @brief Clears pin states that had a latched falling edge (FALL) state
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pins with latched states to clear
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_ClearFallStates(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->FALL = pins;
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}
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/**
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* @brief Get interrupt status from Pin interrupt block
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* @param pPININT : The base address of Pin interrupt block
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* @return Interrupt status (bit n for PININTn = high means interrupt ie pending)
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*/
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STATIC INLINE uint32_t Chip_PININT_GetIntStatus(LPC_PIN_INT_T *pPININT)
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{
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return pPININT->IST;
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}
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/**
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* @brief Clear interrupt status in Pin interrupt block
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* @param pPININT : The base address of Pin interrupt block
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* @param pins : Pin interrupts to clear (ORed value of PININTCH*)
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* @return Nothing
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*/
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STATIC INLINE void Chip_PININT_ClearIntStatus(LPC_PIN_INT_T *pPININT, uint32_t pins)
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{
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pPININT->IST = pins;
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}
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#endif /* if defined(CHIP_LPC1347) */
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PININT_13XX_H_ */
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