While the ST code has a 2 ms stabilization delay for the USBC PHY PLL,
running without this delay showed no problem for at leat 10 USB un/replug
cycles. Observe for problems!
FIXME: Allow run-time selection to allow to handle both HS and FS with
one file
F746 HS port enumerates with error
config 1 interface 2 altsetting 0 bulk endpoint 0x3 has invalid maxpacket 64
Status with examples/device/cdc_msc:
- make BOARD=stm32f723disco => OK
- make BOARD=stm32f723disco PORT=1 => No Reaction
- make BOARD=stm32f746disco => OK
- make BOARD=stm32f746disco PORT=1 => Hangs during enumeration
- make BOARD=stm32f769disco => Hangs during enumeration
Uwe Bonnes